Effect of Clock Receiver Thresholds

The spread between V IL and V IH creates an uncertainty in the exact moment at which a clock receiver will switch. This uncertainty is a normal part of any skew budget, although it may be accounted for in many different ways. For example, input setup times might be referenced to the instant the clock satisfies V IL , while input hold requirements are referenced to the instant the clock satisfies V IH .

Figure 12.20 illustrates the relationship between the signal risetime, signal amplitude, and the uncertainty (or skew) contributed by the effect of uncertain thresholds. Differential receiver families with tight control over V IL and V IH contribute very little skew due to threshold uncertainty.

Figure 12.20. Always incorporate the clock receiver switching uncertainty in your skew budget.

graphics/12fig20.gif

While you cannot much improve the basic uncertainty of a logic family by using an exceptionally fast clock input (because the clock receiver won't respond any faster than normal anyway), you can disadvantage your system by using an overly slow clock waveform, exacerbating the effect of uncertain thresholds.

POINT TO REMEMBER

  • The spread between V IL and V IH creates an uncertainty in the exact moment at which a clock receiver will switch.


Fundamentals

Transmission Line Parameters

Performance Regions

Frequency-Domain Modeling

Pcb (printed-circuit board) Traces

Differential Signaling

Generic Building-Cabling Standards

100-Ohm Balanced Twisted-Pair Cabling

150-Ohm STP-A Cabling

Coaxial Cabling

Fiber-Optic Cabling

Clock Distribution

Time-Domain Simulation Tools and Methods

Points to Remember

Appendix A. Building a Signal Integrity Department

Appendix B. Calculation of Loss Slope

Appendix C. Two-Port Analysis

Appendix D. Accuracy of Pi Model

Appendix E. erf( )

Notes



High-Speed Signal Propagation[c] Advanced Black Magic
High-Speed Signal Propagation[c] Advanced Black Magic
ISBN: 013084408X
EAN: N/A
Year: 2005
Pages: 163

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