## Article first published in EDN Magazine , February 3, 2000The specialized branch of mathematics known as topology studies obscure relationships between seemingly unrelated items. For example, a topologist might point out that a coffee cup and a doughnut are topologically equivalent, both being solid objects with a single hole. Topological equivalence between two objects means that if the first object were made from an infinitely stretchy, rubber-like substance, you could stretch or mold the first object into the shape of the other object without tearing any new holes or closing off any existing holes. You can extend the concept of equivalence relations to the field of digital communications. By changing the impedance, stretching the distance, or adjusting the bandwidth, you can often mold one problem into a form that looks a lot like another problem. Consider the relationship between the telegraph and the telephone. Both use copper -based transmission media but at varying distances and speeds. In the early 1860s telegraph systems operated with simple circuitry at distances of hundreds of miles and an average bandwidth of only a few baud. Later developments boosted the speed considerably, using high-speed paper-tape recording and playback machines to multiplex messages from many human operators onto a single telegraph wire [54] . If you want to know what will happen on-chip tomorrow, look at a pcb today. The telephone uses the same type of wiring as a telegraph, but uses the wiring at a greatly reduced distance and correspondingly higher bandwidth. Plain-old-telephone-service connections with simple circuitry operate at maximum distances of 1 mile and maximum bandwidths of 3 kHz. If you want your telephone line to operate at digital-subscriber-line speeds, the required circuitry gets more complex ”just like in the telegraph problem. The type of wire, the distance, and the sophistication of your circuitry determine the achievable speed of applications such as the telegraph and the telephone. The shorter the wire, the greater its natural bandwidth. The more sophisticated the circuitry, the closer you can push toward full use of the ultimate bandwidth of your channel. The physical principles controlling the behavior of the wires are the same in both telephone and telegraph applications; they just operate at different points on the speed-distance curve. You can usually scale up the speed of any copper-based communications system by scaling down its length. The speed-distance scaling principle applies equally well to wiring used in LAN applications. In the early 1980s several companies noticed that although telephone service was required to operate at distances as great as 1 mile, in-building data wiring needed to go only about 100 m. The available bandwidth of unshielded twisted-pair-type telephone wiring at that short distance is enormous , as demonstrated by the ever-popular 10-Mbps Ethernet 10BaseT, 100-Mbps Fast Ethernet 100BaseTX, and 1000-Mbps Gigabit Ethernet 1000BaseT. Shrinking the wire distances from a telephone-centric 1-mile requirement to a data-centric 100 m gets you easily from telephone speeds to 10 Mbps. To get to 100 Mbps, you use better cabling (category 5). To get to 1000 Mbps, you use four pairs of category-5 cabling and advanced adaptive-equalization techniques. Going further, you can apply the speed-distance-scaling principle to pcb traces. They are transmission lines too, just as in the telegraph, telephone, and LAN applications. Being shorter, they of course work at higher speeds. For applications that reach about 1 GHz at 25-cm distances (10 in.), simple CMOS totem-pole switching circuitry works fine. Applications faster than 1 GHz or longer than 25 cm require advanced circuitry that takes into account trace impedance, terminations, crosstalk, high-frequency losses, multilevel signaling and adaptive equalization. Transmission-line theory will next become important on-chip. Today's chip-layout software takes into account the RC propagation delays of major bus structures and clock lines. In tomorrow's designs, at even higher speeds, the full RLC nature of the on-chip transmission channels will emerge. Ringing, terminations, and adaptively equalized multilevel signaling will all eventually appear on-chip, just as they do on-board . It's inevitable. If you want to know what will happen on-chip tomorrow, look at a pcb today; the problems are rapidly becoming equivalent. |

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Fundamentals

- Impedance of Linear, Time-Invariant, Lumped-Element Circuits
- Power Ratios
- Rules of Scaling
- The Concept of Resonance
- Extra for Experts: Maximal Linear System Response to a Digital Input

Transmission Line Parameters

- Transmission Line Parameters
- Telegraphers Equations
- Derivation of Telegraphers Equations
- Ideal Transmission Line
- DC Resistance
- DC Conductance
- Skin Effect
- Skin-Effect Inductance
- Modeling Internal Impedance
- Concentric-Ring Skin-Effect Model
- Proximity Effect
- Surface Roughness
- Dielectric Effects
- Impedance in Series with the Return Path
- Slow-Wave Mode On-Chip

Performance Regions

- Performance Regions
- Signal Propagation Model
- Hierarchy of Regions
- Necessary Mathematics: Input Impedance and Transfer Function
- Lumped-Element Region
- RC Region
- LC Region (Constant-Loss Region)
- Skin-Effect Region
- Dielectric Loss Region
- Waveguide Dispersion Region
- Summary of Breakpoints Between Regions
- Equivalence Principle for Transmission Media
- Scaling Copper Transmission Media
- Scaling Multimode Fiber-Optic Cables
- Linear Equalization: Long Backplane Trace Example
- Adaptive Equalization: Accelerant Networks Transceiver

Frequency-Domain Modeling

- Frequency-Domain Modeling
- Going Nonlinear
- Approximations to the Fourier Transform
- Discrete Time Mapping
- Other Limitations of the FFT
- Normalizing the Output of an FFT Routine
- Useful Fourier Transform-Pairs
- Effect of Inadequate Sampling Rate
- Implementation of Frequency-Domain Simulation
- Embellishments
- Checking the Output of Your FFT Routine

Pcb (printed-circuit board) Traces

- Pcb (printed-circuit board) Traces
- Pcb Signal Propagation
- Limits to Attainable Distance
- Pcb Noise and Interference
- Pcb Connectors
- Modeling Vias
- The Future of On-Chip Interconnections

Differential Signaling

- Differential Signaling
- Single-Ended Circuits
- Two-Wire Circuits
- Differential Signaling
- Differential and Common-Mode Voltages and Currents
- Differential and Common-Mode Velocity
- Common-Mode Balance
- Common-Mode Range
- Differential to Common-Mode Conversion
- Differential Impedance
- Pcb Configurations
- Pcb Applications
- Intercabinet Applications
- LVDS Signaling

Generic Building-Cabling Standards

- Generic Building-Cabling Standards
- Generic Cabling Architecture
- SNR Budgeting
- Glossary of Cabling Terms
- Preferred Cable Combinations
- FAQ: Building-Cabling Practices
- Crossover Wiring
- Plenum-Rated Cables
- Laying Cables in an Uncooled Attic Space
- FAQ: Older Cable Types

100-Ohm Balanced Twisted-Pair Cabling

- 100-Ohm Balanced Twisted-Pair Cabling
- UTP Signal Propagation
- UTP Transmission Example: 10BASE-T
- UTP Noise and Interference
- UTP Connectors
- Issues with Screening
- Category-3 UTP at Elevated Temperature

150-Ohm STP-A Cabling

- 150-Ohm STP-A Cabling
- 150- W STP-A Signal Propagation
- 150- W STP-A Noise and Interference
- 150- W STP-A: Skew
- 150- W STP-A: Radiation and Safety
- 150- W STP-A: Comparison with UTP
- 150- W STP-A Connectors

Coaxial Cabling

- Coaxial Cabling
- Coaxial Signal Propagation
- Coaxial Cable Noise and Interference
- Coaxial Cable Connectors

Fiber-Optic Cabling

- Fiber-Optic Cabling
- Making Glass Fiber
- Finished Core Specifications
- Cabling the Fiber
- Wavelengths of Operation
- Multimode Glass Fiber-Optic Cabling
- Single-Mode Fiber-Optic Cabling

Clock Distribution

- Clock Distribution
- Extra Fries, Please
- Arithmetic of Clock Skew
- Clock Repeaters
- Stripline vs. Microstrip Delay
- Importance of Terminating Clock Lines
- Effect of Clock Receiver Thresholds
- Effect of Split Termination
- Intentional Delay Adjustments
- Driving Multiple Loads with Source Termination
- Daisy-Chain Clock Distribution
- The Jitters
- Power Supply Filtering for Clock Sources, Repeaters, and PLL Circuits
- Intentional Clock Modulation
- Reduced-Voltage Signaling
- Controlling Crosstalk on Clock Lines
- Reducing Emissions

Time-Domain Simulation Tools and Methods

- Ringing in a New Era
- Signal Integrity Simulation Process
- The Underlying Simulation Engine
- IBIS (I/O Buffer Information Specification)
- IBIS: History and Future Direction
- IBIS: Issues with Interpolation
- IBIS: Issues with SSO Noise
- Nature of EMC Work
- Power and Ground Resonance

Points to Remember

Appendix A. Building a Signal Integrity Department

Appendix B. Calculation of Loss Slope

Appendix C. Two-Port Analysis

- Appendix C. Two-Port Analysis
- Simple Cases Involving Transmission Lines
- Fully Configured Transmission Line
- Complicated Configurations

Appendix D. Accuracy of Pi Model

Appendix E. erf( )

Notes

High-Speed Signal Propagation[c] Advanced Black Magic

ISBN: 013084408X

EAN: N/A

EAN: N/A

Year: 2005

Pages: 163

Pages: 163

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