A stripline is any trace separated from the air by a solid conductive reference plane on both sides. The electric fields from such a trace are totally contained between the two solid planes, so the speed of propagation for signals traveling on the trace is entirely determined by the dielectric constant of the pcb dielectric material. The speed of propagation for a stripline is independent of the trace geometry or impedance. A stripline need not be symmetrically located between the planes to qualify as a stripline. The term offset stripline is used to describe an asymmetrically positioned stripline (as shown in the pcb cross section in Figure 12.16).

Figure 12.16. The electric field surrounding a microstrip resides partly within the pcb dielectric material and partly within the surrounding air.

A microstrip is any trace fabricated on the outside layer of a pcb. A microstrip has pcb dielectric on one side and air on the other. A microstrip covered with soldermask or more layers of dielectric, but not covered with a solid conductive reference plane, is still called microstrip, although the term embedded microstrip may be used to describe such a trace.

The electric fields surrounding a microstrip reside partly within the pcb dielectric material and partly within the surrounding air. The speed of propagation for signals traveling on the trace is therefore determined partly by the dielectric constant of the pcb dielectric material and partly by the dielectric properties of air. Because the dielectric constant of air is always less than the dielectric constant of the pcb material, mixing a little air into the transmission-line speed equation always speeds up the signal propagation. In simple terms, microstrip traces are always a little faster than stripline traces (Figure 12.16).

Even if you adjust the trace widths on each layer so that the impedances are the same, the speed of propagation on the microstrip layers is always faster. The exact amount of speedup depends on the geometry of the microstrip traces (Table 12.2). A high-impedance, skinny microstrip, high up off the board, has the greatest proportion of its electric field carried in air and the greatest speed. A low-impedance, wide microstrip, pressed down close to the planes, carries more of its electric field in the pcb dielectric, resulting in a trace that is less speedy than its high-impedance counterpart , but still always faster than a stripline.

The only exceptions to the "microstrips are faster" rule would occur on a board with different dielectric materials used on different layers, such as a board built with FR-4 on the outer layers and Rogers RT/duroid 5580 on the inner layers. Such a board might provide exceptional RF properties on one layer without incurring the expense of exotic materials on all the other layers. Inhomogeneous board stack-ups must be thoroughly engineered to avoid difficulties with the different X-Y thermal expansion rates of the constituent materials.

The microstrip configurations listed in Table 12.2 range from 13% to 17% faster than the stripline configuration. Many layout people know about this issue and can automatically adjust trace lengths to compensate, so that at nominal temperature, clocks running on either microstrip or stripline traces will arrive at the same time (Figure 12.17). Trace-length compensation is helpful, but doesn't solve the whole problem with skew between microstrip and stripline layers. To see why, you need to think about variations in the electric permittivity with temperature.

Figure 12.17. On runs of equal length, the top layer may incorporate serpentine traces to equalize the delay between the microstrip and stripline configurations.

Table 12.2. Propagation Delay of Typical Microstrip Traces

Microstrip geometry |
|||
---|---|---|---|

h mil |
w mil |
Impedance W |
re |

3 |
3 |
59.6 |
3.14 |

3 |
4 |
53.0 |
3.19 |

3 |
5 |
47.8 |
3.24 |

3 |
6 |
43.6 |
3.28 |

3 |
7 |
37.1 |
3.37 |

Stripline geometry |
|||

h mil |
w mil |
Impedance W |
re |

any |
any |
any |
4.30 |

NOTE ”This table assumes an FR-4 dielectric with r = 4.30 at 1 GHz using copper traces of 1-oz thickness (including plating ) with s = 5.98 10 7 S/m plus a conformal coating (soldermask) consisting of a 12.7- m m (0.5-mil) layer having a dielectric constant of 3.3. The propagation velocity v (m/s) and delay t p (s/m) are found from re , where and c = 2.998 ·10 8 m/s. |

Table 12.2 lists only the trace delay at nominal room temperature. Over the temperature range of 0 to +70 °C, the dielectric constant for FR-4 can vary as much as 10%. The trace delay for striplines , being proportional to the square root of the dielectric constant, will vary about 5% over the same temperature range.

Microstrip traces are different, because the surrounding dielectric medium for a microstrip is a mixture of FR-4 and air. When the temperature changes, the portion of the electric field residing in the FR-4 is affected, but the portion of the field in the air is not. The dielectric constant for air is rock solid and does not change with temperature. As a result, the temperature coefficient for microstrip traces (percent change in velocity per degree Celsius) is less severe than for striplines. Fifty-ohm FR-4 microstrip traces suffer a speed variation of only about 3% over the temperature range of 0 to +70 °C.

The difference in temperature coefficients for microstrips versus striplines implies that even if the delays are perfectly matched at nominal room temperature, the traces will still be mismatched by one percent or more at either end of the temperature scale. For a 30-cm (12-in.) trace, the mismatch amounts to a variation of ±20 ps between microstrip and stripline delays. This amount of mismatch represents a small but noticeable portion of a high-speed system skew budget.

For the best speed matching, implement all your clock traces on microstrips or all on striplines, but don't mix and match the two types.

POINT TO REMEMBER

- Given similar dielectrics, signals propagate faster on a microstrip layer than on a stripline layer. For best speed matching, don't mix the two types.

Fundamentals

- Impedance of Linear, Time-Invariant, Lumped-Element Circuits
- Power Ratios
- Rules of Scaling
- The Concept of Resonance
- Extra for Experts: Maximal Linear System Response to a Digital Input

Transmission Line Parameters

- Transmission Line Parameters
- Telegraphers Equations
- Derivation of Telegraphers Equations
- Ideal Transmission Line
- DC Resistance
- DC Conductance
- Skin Effect
- Skin-Effect Inductance
- Modeling Internal Impedance
- Concentric-Ring Skin-Effect Model
- Proximity Effect
- Surface Roughness
- Dielectric Effects
- Impedance in Series with the Return Path
- Slow-Wave Mode On-Chip

Performance Regions

- Performance Regions
- Signal Propagation Model
- Hierarchy of Regions
- Necessary Mathematics: Input Impedance and Transfer Function
- Lumped-Element Region
- RC Region
- LC Region (Constant-Loss Region)
- Skin-Effect Region
- Dielectric Loss Region
- Waveguide Dispersion Region
- Summary of Breakpoints Between Regions
- Equivalence Principle for Transmission Media
- Scaling Copper Transmission Media
- Scaling Multimode Fiber-Optic Cables
- Linear Equalization: Long Backplane Trace Example
- Adaptive Equalization: Accelerant Networks Transceiver

Frequency-Domain Modeling

- Frequency-Domain Modeling
- Going Nonlinear
- Approximations to the Fourier Transform
- Discrete Time Mapping
- Other Limitations of the FFT
- Normalizing the Output of an FFT Routine
- Useful Fourier Transform-Pairs
- Effect of Inadequate Sampling Rate
- Implementation of Frequency-Domain Simulation
- Embellishments
- Checking the Output of Your FFT Routine

Pcb (printed-circuit board) Traces

- Pcb (printed-circuit board) Traces
- Pcb Signal Propagation
- Limits to Attainable Distance
- Pcb Noise and Interference
- Pcb Connectors
- Modeling Vias
- The Future of On-Chip Interconnections

Differential Signaling

- Differential Signaling
- Single-Ended Circuits
- Two-Wire Circuits
- Differential Signaling
- Differential and Common-Mode Voltages and Currents
- Differential and Common-Mode Velocity
- Common-Mode Balance
- Common-Mode Range
- Differential to Common-Mode Conversion
- Differential Impedance
- Pcb Configurations
- Pcb Applications
- Intercabinet Applications
- LVDS Signaling

Generic Building-Cabling Standards

- Generic Building-Cabling Standards
- Generic Cabling Architecture
- SNR Budgeting
- Glossary of Cabling Terms
- Preferred Cable Combinations
- FAQ: Building-Cabling Practices
- Crossover Wiring
- Plenum-Rated Cables
- Laying Cables in an Uncooled Attic Space
- FAQ: Older Cable Types

100-Ohm Balanced Twisted-Pair Cabling

- 100-Ohm Balanced Twisted-Pair Cabling
- UTP Signal Propagation
- UTP Transmission Example: 10BASE-T
- UTP Noise and Interference
- UTP Connectors
- Issues with Screening
- Category-3 UTP at Elevated Temperature

150-Ohm STP-A Cabling

- 150-Ohm STP-A Cabling
- 150- W STP-A Signal Propagation
- 150- W STP-A Noise and Interference
- 150- W STP-A: Skew
- 150- W STP-A: Radiation and Safety
- 150- W STP-A: Comparison with UTP
- 150- W STP-A Connectors

Coaxial Cabling

- Coaxial Cabling
- Coaxial Signal Propagation
- Coaxial Cable Noise and Interference
- Coaxial Cable Connectors

Fiber-Optic Cabling

- Fiber-Optic Cabling
- Making Glass Fiber
- Finished Core Specifications
- Cabling the Fiber
- Wavelengths of Operation
- Multimode Glass Fiber-Optic Cabling
- Single-Mode Fiber-Optic Cabling

Clock Distribution

- Clock Distribution
- Extra Fries, Please
- Arithmetic of Clock Skew
- Clock Repeaters
- Stripline vs. Microstrip Delay
- Importance of Terminating Clock Lines
- Effect of Clock Receiver Thresholds
- Effect of Split Termination
- Intentional Delay Adjustments
- Driving Multiple Loads with Source Termination
- Daisy-Chain Clock Distribution
- The Jitters
- Power Supply Filtering for Clock Sources, Repeaters, and PLL Circuits
- Intentional Clock Modulation
- Reduced-Voltage Signaling
- Controlling Crosstalk on Clock Lines
- Reducing Emissions

Time-Domain Simulation Tools and Methods

- Ringing in a New Era
- Signal Integrity Simulation Process
- The Underlying Simulation Engine
- IBIS (I/O Buffer Information Specification)
- IBIS: History and Future Direction
- IBIS: Issues with Interpolation
- IBIS: Issues with SSO Noise
- Nature of EMC Work
- Power and Ground Resonance

Points to Remember

Appendix A. Building a Signal Integrity Department

Appendix B. Calculation of Loss Slope

Appendix C. Two-Port Analysis

- Appendix C. Two-Port Analysis
- Simple Cases Involving Transmission Lines
- Fully Configured Transmission Line
- Complicated Configurations

Appendix D. Accuracy of Pi Model

Appendix E. erf( )

Notes

High-Speed Signal Propagation[c] Advanced Black Magic

ISBN: 013084408X

EAN: N/A

EAN: N/A

Year: 2005

Pages: 163

Pages: 163

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