Every digital receiver comes with a specification for its common-mode input range. You are expected to ensure that input signals remain within this range at all times. As long as both inputs stay within the common-mode operating range, the component will meet or exceed its specification for the input switching threshold. Beyond that, manufacturers give few clues as to how the component will operate. It may operate normally. On the other hand, it may reverse its outputs, it may saturate and take a long time to recover, it may lock up into a brain-damaged state until power-cycled, or it may permanently fail. You never know which [55] . Don't violate this specification (even for a brief period).
The common-mode range specification is definitely useful, but I'd like to know more about a receiver. For example, let's say you are receiving a 500-mV differential clock input. Add to each signal a common-mode noise voltage of 1-V p-p. How much jitter will come out of the clock? You can't figure that out from the specifications.
Another source of clock jitter is noise from the power supply. Suppose there is a 100-mV AC ripple on V CC . How much jitter will you get? You can't figure that out from the specifications, either.
Both examples deal with the issue of common-mode rejection , which is one measure of how much the input switching threshold changes in response to a defined noise input. For linear amplifiers , it's common to see a common-mode rejection ratio (CMRR) specification for common-mode noise at the input terminals and also for noise at the power terminals. For example, a CMRR of “50 dB for V CC means that a 100-mV ripple on V CC will have the same effect as an equivalent differential noise source of 0.3 mV (that's 100-mV less 50 dB). The CMRR translates each type of noise into an equivalent differential noise level at the input. You can then add up all the equivalent input noise figures to determine the overall signal-to-noise ratio, or jitter performance, of your system.
The common-mode range specification used in digital comparators and receivers doesn't break down the sources of noise, so there's no way to do jitter analysis.
POINT TO REMEMBER
Fundamentals
Transmission Line Parameters
Performance Regions
Frequency-Domain Modeling
Pcb (printed-circuit board) Traces
Differential Signaling
Generic Building-Cabling Standards
100-Ohm Balanced Twisted-Pair Cabling
150-Ohm STP-A Cabling
Coaxial Cabling
Fiber-Optic Cabling
Clock Distribution
Time-Domain Simulation Tools and Methods
Points to Remember
Appendix A. Building a Signal Integrity Department
Appendix B. Calculation of Loss Slope
Appendix C. Two-Port Analysis
Appendix D. Accuracy of Pi Model
Appendix E. erf( )
Notes