BLOCK FLOATING-POINT BINARY FORMAT
REFERENCES
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[2] Knuth, D. E. The Art of Computer Programming: Seminumerical Methods, Vol. 2, Section 4.1, Addison-Wesley Publishing, Reading, Massachusetts, 1981, p. 179.
[3] Kester, W. "Peripheral Circuits Can Make or Break Sampling-ADC Systems," EDN Magazine, October 1, 1992.
[4] Grove, M. "Measuring Frequency Response and Effective Bits Using Digital Signal Processing Techniques," Hewlett-Packard Journal, February 1992.
[5] Tektronix. "Effective Bits Testing Evaluates Dynamic Range Performance of Digitizing Instruments," Tektronix Application Note, No. 45W-7527, December 1989.
[6] Ushani, R. "Subranging ADCs Operate at High Speed with High Resolution," EDN Magazine, April 11, 1991.
[7] Demler, M. "Time-Domain Techniques Enhance Testing of High-Speed ADCs," EDN Magazine, March 30, 1992.
[8] Hilton, H. "A 10-MHz Analog-to-Digital Converter with 110-dB Linearity," Hewlett-Packard Journal, October 1993.
[9] Lyons, R. G. "Providing Software Flexibility for Optical Processor Noise Analysis," Computer Design, July 1978, p. 95.
[10] Knuth, D. E. The Art of Computer Programming: Seminumerical Methods, Vol. 2, Section 4.2, Addison-Wesley Publishing, Reading, Massachusetts, 1981, p. 198.
[11] Rabiner, L. R., and Gold, B. Theory and Application of Digital Signal Processing, Chapter 5, Prentice-Hall, Englewood Cliffs, New Jersey, 1975, p. 353.
[12] Jackson, L. B. "An Analysis of Limit Cycles Due to Multiplicative Rounding in Recursive Digital Filters," Proc. 7th Allerton Conf. Circuit System Theory, 1969, pp. 69–78.
[13] Kan, E. P.F, and Aggarwal, J. K. "Error Analysis of Digital Filters Employing Floating Point Arithmetic," IEEE Trans. Circuit Theory, Vol. CT-18, November 1971, pp. 678–686.
[14] Crochiere, R. E. "Digital Ladder Structures and Coefficient Sensitivity," IEEE Trans. Audio Electroacoustics, Vol. AU-20, October 1972, pp. 240–246.
[15] Jackson, L. B. "On the Interaction of Roundoff Noise and Dynamic Range in Digital Filters," Bell System Technical Journal, Vol. 49, February 1970, pp. 159–184.
[16] Roberts, R. A., and Mullis, C. T. Digital Signal Processing, Addison-Wesley Publishing, Reading, Massachusetts, 1987, p. 277.
[17] Jackson, L. B. "Roundoff Noise Analysis for Fixed-Point Digital Filters Realized in Cascade or Parallel Form," IEEE Trans. Audio Electroacoustics, Vol. AU-18, June 1970, pp. 107–122.
[18] Oppenheim, A. V., and Schafer, R. W. Discrete-Time Signal Processing, Sections 6.8 and 9.8, Prentice-Hall, Englewood Cliffs, New Jersey, 1989, p. 335.
[19] Larimer, J., and D. Chen. "Fixed or Floating? A Pointed Question in DSPs," EDN Magazine, August 3, 1995.
[20] Ashton, C. "Floating Point Math Handles Iterative and Recursive Algorithms," EDN Magazine, January 9, 1986.
[21] Windsor, B., and Wilson, J. "Arithmetic Duo Excels in Computing Floating Point Products," Electronic Design, May 17, 1984.
[22] Windsor, W. A. "IEEE Floating Point Chips Implement DSP Architectures," Computer Design, January 1985.
[23] Texas Instruments Inc., Digital Signal Processing Applications with the TMS320 Family: Theory, Algorithms, and Implementations, SPRA012A, Texas Instruments, Dallas, TX, 1986.
[24] Strauss, W. I. "Integer or Floating Point? Making the Choice," Computer Design Magazine, April 1, 1990, p. 85.
[25] Oppenheim and Weinstein. "Effects of Finite Register Length in Digital Filtering and the Fast Fourier Transform," Proc. IEEE, August 1972, pp. 957–976.
[26] Woods, R. E. "Transform-Based Processing: "How Much Precision Is Needed?" ESD: The Electronic System Design Magazine, February 1987.
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