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ItaniumR Architecture for Programmers. Understanding 64-Bit Processors and EPIC Principles
ItaniumR Architecture for Programmers. Understanding 64-Bit Processors and EPIC Principles
ISBN: N/A
EAN: N/A
Year: 2003
Pages: 223
BUY ON AMAZON
Main Page
Table of content
Copyright
Hewlett-Packard Professional Books
List of Figures
List of Tables
Preface
Acknowledgments
Trademarks
Chapter 1. Architecture and Implementation
1.1 Analogy: Piano Architecture
1.2 Types of Computer Languages
1.3 Why Study Assembly Language?
1.4 Prefixes for Binary Multiples
1.5 Instruction Set Architectures
1.6 The Life Cycle of Computer Architectures
1.7 SQUARES: A First Programming Example
1.8 Review of Number Systems
Summary
References
Exercises
Chapter 2. Computer Structures and Data Representations
2.1 Computer Structures
2.2 Instruction Execution
2.3 Classes of Instruction Set Architectures
2.4 Migration to 64-Bit Architectures
2.5 Itanium Information Units and Data Types
Summary
References
Exercises
Chapter 3. The Program Assembler and Debugger
3.1 Programming Environments
3.2 Program Development Steps
3.3 Comparing Variants of a Source File
3.4 Assembler Statement Types
3.5 The Functions of a Symbolic Assembler
3.6 The Assembly Process
3.7 The Linking Process
3.8 The Program Debugger
3.9 Conventions for Writing Programs
Summary
References
Exercises
Chapter 4. Itanium Instruction Formats and Addressing
4.1 Overview of Itanium Instruction Formats
4.2 Integer Arithmetic Instructions
4.3 Bit Encoding for Itanium Instructions
4.4 HEXNUM: Using Arithmetic Instructions
4.5 Data Access Instructions
4.6 Other ALU Instructions
4.7 DOTPROD: Using Data Access Instructions
4.8 Itanium Addressing Modes
4.9 Addressing in Other Architectures
Summary
References
Exercises
Chapter 5. Comparison, Branches, and Predication
5.1 Hardware Basis for Control of Flow
5.2 Integer Compare Instructions
5.3 Program Branching
5.4 DOTLOOP: Using a Counted Loop
5.5 Stops, Instruction Groups, and Performance
5.6 DOTCLOOP: Using the Loop Count Register
5.7 Other Structured Programming Constructs
5.8 MAXIMUM: Using Conditional Instructions
Summary
References
Exercises
Chapter 6. Logical Operations, Bit-Shifts, and Bytes
6.1 Logical Functions
6.2 HEXNUM2: Using Logical Masks
6.3 Bit and Field Operations
6.4 SCANTEXT: Processing Bytes
6.5 Integer Multiplication and Division
6.6 DECNUM: Converting an Integer to Decimal Format
6.7 Using C for ASCII Input and Output
6.8 BACKWARD: Using Byte Manipulations
Summary
References
Exercises
Chapter 7. Subroutines, Procedures, and Functions
7.1 Memory Stacks
7.2 DECNUM2: Using Stack Operations
7.3 Register Stacks
7.4 Program Segmentation
7.5 Calling Conventions
7.6 DECNUM3 and BOOTH: Making a Function
7.7 Integer Quotients and Remainders
7.8 RANDOM: A Callable Function
Summary
References
Exercises
Chapter 8. Floating-Point Operations
8.1 Parallels Between Integer and Floating-Point Instructions
8.2 Representations of Floating-Point Values
8.3 Copying Floating-Point Data
8.4 Floating-Point Arithmetic Instructions
8.5 HORNER: Evaluating a Polynomial
8.6 Predication Based on Floating-Point Values
8.7 Integer Operations in Floating-Point Execution Units
8.8 Approximations for Reciprocals and Square Roots
8.9 APPROXPI: Using Floating-Point Instructions
Summary
References
Exercises
Chapter 9. Input and Output of Text
9.1 File Systems
9.2 Keyboard and Display IO
9.3 SCANTERM: Using C Standard IO
9.4 SORTSTR: Sorting Strings
9.5 Text File IO
9.6 SCANFILE: Input and Output with Files
9.7 SORTINT: Sorting Integers from a File
9.8 Binary Files
Summary
References
Exercises
Chapter 10. Performance Considerations
10.1 Processor-Level Parallelism
10.2 Instruction-Level Parallelism
10.3 Explicit Parallelism in the Itanium Processors
10.4 Software-Pipelined Loops
10.5 Modulo Scheduling a Loop
10.6 Program Optimization Factors
10.7 Fibonacci Numbers
Summary
References
Exercises
Chapter 11. Looking at Output from Compilers
11.1 Compilers for RISC-like Systems
11.2 Compiling a Simple Program
11.3 Optimizing a Simple Program
11.4 Inline Optimizations
11.5 Profile-Guided or Other Optimizations
11.6 Debugging Optimized Programs
11.7 Recursion for Fibonacci Numbers Revisited
Summary
References
Exercises
Chapter 12. Parallel Operations
12.1 Classification of Computing Systems
12.2 Integer Parallel Operations
12.3 Applications to Integer Multiplication
12.4 Opportunities and Challenges
12.5 Floating-Point Parallel Operations
12.6 Semaphore Support for Parallel Processes
Summary
References
Exercises
Chapter 13. Variations Among Implementations
13.1 Why Implementations Change
13.2 How Implementations Change
13.3 The Original Itanium Processor
13.4 A Major Role for Software
13.5 IA -32 Instruction Set Mode
13.6 Determining Extensions and Implementation Version
Summary
References
Exercises
Appendix A. Command-Line Environments
Logging in
Logging out
Security
Text editing
Uploading files
Learning about commands
Learning about your environment
Inspecting an HP-UX or Linux file
References
Exercises
Appendix B. Suggested System Resources
B.1 System Hardware
B.2 System Software
B.3 Desktop Client Access Software
References
Appendix C. Itanium Instruction Set
References
Appendix D. Itanium Registers and Their Uses
D.1 Instruction Pointer
D.2 General Registers and NaT Bits
D.3 Predicate Registers
D.4 Branch Registers
D.5 Floating-Point Registers
D.6 Application Registers
D.7 State Management Registers
D.8 System Information Registers
D.9 System Control Registers
References
Appendix E. Conditional Assembly and Macros (GCC Assembler)
E.1 Interference from Explicit Stops
E.2 Repeat Blocks
E.3 Conditional Assembly
E.4 Macro Processing
E.5 Using Labels with Macros
E.6 Recursive Macros
E.7 Object File Sections
E.8 MONEY: A Macro Illustrating Sections
Summary
References
Exercises
Appendix F. Inline Assembly
F.1 HP-UX C Compilers
F.2 GCC Compiler for Linux
F.3 Intel Compilers for Linux
References
Bibliography
Answers and Hints for Selected Exercises
Chapter 1
Chapter 2
Chapter 3
Chapter 4
Chapter 5
Chapter 6
Chapter 7
Chapter 8
Chapter 9
Chapter 10
Chapter 11
Chapter 12
Chapter 13
Appendix E
About the Authors
ItaniumR Architecture for Programmers. Understanding 64-Bit Processors and EPIC Principles
ISBN: N/A
EAN: N/A
Year: 2003
Pages: 223
BUY ON AMAZON
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