Table of content

  
• Table of Contents
Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles
By James S. Evans Lawrence University, Gregory L. Trimper viika
 
Publisher: Prentice Hall PTR
Pub Date: April 28, 2003
ISBN: 0-13-101372-6
Pages: 576
   Copyright
   Hewlett-Packard® Professional Books
   List of Figures
   List of Tables
   Preface
      Acknowledgments
   Trademarks
   Chapter 1.  Architecture and Implementation
      Section 1.1.  Analogy: Piano Architecture
      Section 1.2.  Types of Computer Languages
      Section 1.3.  Why Study Assembly Language?
      Section 1.4.  Prefixes for Binary Multiples
      Section 1.5.  Instruction Set Architectures
      Section 1.6.  The Life Cycle of Computer Architectures
      Section 1.7.  SQUARES: A First Programming Example
      Section 1.8.  Review of Number Systems
      Summary
      References
      Exercises
   Chapter 2.  Computer Structures and Data Representations
      Section 2.1.  Computer Structures
      Section 2.2.  Instruction Execution
      Section 2.3.  Classes of Instruction Set Architectures
      Section 2.4.  Migration to 64-Bit Architectures
      Section 2.5.  Itanium Information Units and Data Types
      Summary
      References
      Exercises
   Chapter 3.  The Program Assembler and Debugger
      Section 3.1.  Programming Environments
      Section 3.2.  Program Development Steps
      Section 3.3.  Comparing Variants of a Source File
      Section 3.4.  Assembler Statement Types
      Section 3.5.  The Functions of a Symbolic Assembler
      Section 3.6.  The Assembly Process
      Section 3.7.  The Linking Process
      Section 3.8.  The Program Debugger
      Section 3.9.  Conventions for Writing Programs
      Summary
      References
      Exercises
   Chapter 4.  Itanium Instruction Formats and Addressing
      Section 4.1.  Overview of Itanium Instruction Formats
      Section 4.2.  Integer Arithmetic Instructions
      Section 4.3.  Bit Encoding for Itanium Instructions
      Section 4.4.  HEXNUM: Using Arithmetic Instructions
      Section 4.5.  Data Access Instructions
      Section 4.6.  Other ALU Instructions
      Section 4.7.  DOTPROD: Using Data Access Instructions
      Section 4.8.  Itanium Addressing Modes
      Section 4.9.  Addressing in Other Architectures
      Summary
      References
      Exercises
   Chapter 5.  Comparison, Branches, and Predication
      Section 5.1.  Hardware Basis for Control of Flow
      Section 5.2.  Integer Compare Instructions
      Section 5.3.  Program Branching
      Section 5.4.  DOTLOOP: Using a Counted Loop
      Section 5.5.  Stops, Instruction Groups, and Performance
      Section 5.6.  DOTCLOOP: Using the Loop Count Register
      Section 5.7.  Other Structured Programming Constructs
      Section 5.8.  MAXIMUM: Using Conditional Instructions
      Summary
      References
      Exercises
   Chapter 6.  Logical Operations, Bit-Shifts, and Bytes
      Section 6.1.  Logical Functions
      Section 6.2.  HEXNUM2: Using Logical Masks
      Section 6.3.  Bit and Field Operations
      Section 6.4.  SCANTEXT: Processing Bytes
      Section 6.5.  Integer Multiplication and Division
      Section 6.6.  DECNUM: Converting an Integer to Decimal Format
      Section 6.7.  Using C for ASCII Input and Output
      Section 6.8.  BACKWARD: Using Byte Manipulations
      Summary
      References
      Exercises
   Chapter 7.  Subroutines, Procedures, and Functions
      Section 7.1.  Memory Stacks
      Section 7.2.  DECNUM2: Using Stack Operations
      Section 7.3.  Register Stacks
      Section 7.4.  Program Segmentation
      Section 7.5.  Calling Conventions
      Section 7.6.  DECNUM3 and BOOTH: Making a Function
      Section 7.7.  Integer Quotients and Remainders
      Section 7.8.  RANDOM: A Callable Function
      Summary
      References
      Exercises
   Chapter 8.  Floating-Point Operations
      Section 8.1.  Parallels Between Integer and Floating-Point Instructions
      Section 8.2.  Representations of Floating-Point Values
      Section 8.3.  Copying Floating-Point Data
      Section 8.4.  Floating-Point Arithmetic Instructions
      Section 8.5.  HORNER: Evaluating a Polynomial
      Section 8.6.  Predication Based on Floating-Point Values
      Section 8.7.  Integer Operations in Floating-Point Execution Units
      Section 8.8.  Approximations for Reciprocals and Square Roots
      Section 8.9.  APPROXPI: Using Floating-Point Instructions
      Summary
      References
      Exercises
   Chapter 9.  Input and Output of Text
      Section 9.1.  File Systems
      Section 9.2.  Keyboard and Display I/O
      Section 9.3.  SCANTERM: Using C Standard I/O
      Section 9.4.  SORTSTR: Sorting Strings
      Section 9.5.  Text File I/O
      Section 9.6.  SCANFILE: Input and Output with Files
      Section 9.7.  SORTINT: Sorting Integers from a File
      Section 9.8.  Binary Files
      Summary
      References
      Exercises
   Chapter 10.  Performance Considerations
      Section 10.1.  Processor-Level Parallelism
      Section 10.2.  Instruction-Level Parallelism
      Section 10.3.  Explicit Parallelism in the Itanium Processors
      Section 10.4.  Software-Pipelined Loops
      Section 10.5.  Modulo Scheduling a Loop
      Section 10.6.  Program Optimization Factors
      Section 10.7.  Fibonacci Numbers
      Summary
      References
      Exercises
   Chapter 11.  Looking at Output from Compilers
      Section 11.1.  Compilers for RISC-like Systems
      Section 11.2.  Compiling a Simple Program
      Section 11.3.  Optimizing a Simple Program
      Section 11.4.  Inline Optimizations
      Section 11.5.  Profile-Guided or Other Optimizations
      Section 11.6.  Debugging Optimized Programs
      Section 11.7.  Recursion for Fibonacci Numbers Revisited
      Summary
      References
      Exercises
   Chapter 12.  Parallel Operations
      Section 12.1.  Classification of Computing Systems
      Section 12.2.  Integer Parallel Operations
      Section 12.3.  Applications to Integer Multiplication
      Section 12.4.  Opportunities and Challenges
      Section 12.5.  Floating-Point Parallel Operations
      Section 12.6.  Semaphore Support for Parallel Processes
      Summary
      References
      Exercises
   Chapter 13.  Variations Among Implementations
      Section 13.1.  Why Implementations Change
      Section 13.2.  How Implementations Change
      Section 13.3.  The Original Itanium Processor
      Section 13.4.  A Major Role for Software
      Section 13.5.  IA -32 Instruction Set Mode
      Section 13.6.  Determining Extensions and Implementation Version
      Summary
      References
      Exercises
   Appendix A.  Command-Line Environments
      Logging in
      Logging out
      Security
      Text editing
      Uploading files
      Learning about commands
      Learning about your environment
      Inspecting an HP-UX or Linux file
      References
      Exercises
   Appendix B.  Suggested System Resources
      Section B.1.  System Hardware
      Section B.2.  System Software
      Section B.3.  Desktop Client Access Software
      References
   Appendix C.  Itanium Instruction Set
      References
   Appendix D.  Itanium Registers and Their Uses
      Section D.1.  Instruction Pointer
      Section D.2.  General Registers and NaT Bits
      Section D.3.  Predicate Registers
      Section D.4.  Branch Registers
      Section D.5.  Floating-Point Registers
      Section D.6.  Application Registers
      Section D.7.  State Management Registers
      Section D.8.  System Information Registers
      Section D.9.  System Control Registers
      References
   Appendix E.  Conditional Assembly and Macros (GCC Assembler)
      Section E.1.  Interference from Explicit Stops
      Section E.2.  Repeat Blocks
      Section E.3.  Conditional Assembly
      Section E.4.  Macro Processing
      Section E.5.  Using Labels with Macros
      Section E.6.  Recursive Macros
      Section E.7.  Object File Sections
      Section E.8.  MONEY: A Macro Illustrating Sections
      Summary
      References
      Exercises
   Appendix F.  Inline Assembly
      Section F.1.  HP-UX C Compilers
      Section F.2.  GCC Compiler for Linux
      Section F.3.  Intel Compilers for Linux
      References
   Bibliography
   Answers and Hints for Selected Exercises
      Chapter 1
      Chapter 2
      Chapter 3
      Chapter 4
      Chapter 5
      Chapter 6
      Chapter 7
      Chapter 8
      Chapter 9
      Chapter 10
      Chapter 11
      Chapter 12
      Chapter 13
      Appendix E
   About the Authors


ItaniumR Architecture for Programmers. Understanding 64-Bit Processors and EPIC Principles
ItaniumR Architecture for Programmers. Understanding 64-Bit Processors and EPIC Principles
ISBN: N/A
EAN: N/A
Year: 2003
Pages: 223

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