Section 9.1. A Mixed Hardware and Software Approach

9.1. A Mixed Hardware and Software Approach

For embedded system designers considering a mixed software/hardware implementation (whether that implementation is intended for testing of a hardware module or as part of a larger system), an important step is to evaluate the relative merits of various hardware and software targets for specific elements of the overall system. Often this evaluation is done based on the designer's past experience, by using "back of the envelope" calculations regarding raw instruction cycle counts for key calculations, or through an analysis of data throughput requirements. One specific step in such an evaluation may be to implement the same algorithm (which typically represents one component or software process within a larger hardware/software application) in both an embedded processor and in FPGA hardware to analyze the relative merits of a software versus hardware solution. In doing so, the designer must evaluate not only the resulting performance of the core algorithm but the relative overhead of setting up and managing the necessary software/hardware interfaces.

A critical factor in such an evaluation is the ability to compile algorithms to both a traditional microprocessor and to hardware, creating a test environment that allows both software and hardware versions to be tested and measured using identical inputs. As you've seen, the use of C-to-hardware compilation can assist in the process and allows a high degree of creativity on the part of the designer. This is because the software developer is free to quickly evaluate radically different ways of partitioning, describing, and implementing a mixed hardware/software application, without the need to write low-level hardware descriptions for those portions destined for hardware, or to make tedious hand calculations to determine relative performance numbers.

Considering Data Transfer Overhead

In algorithms involving streams of data (which represent a large percentage of the required processing in such domains as image processing and communications) there is a critical trade-off to be considered: the amount of computation required versus the data transfer overhead. More specifically, any evaluation of the merits of a hardware-based approach must consider, through direct measurement if possible, the cost of moving data between software components of the system (running on a traditional processor) and the dedicated hardware.

Every application evaluated in such a way will yield different cost/benefit results. The greatest benefits of hardware-based approaches are found in algorithms that are not unduly constrained by I/O, are computationally intensive, and include opportunities for parallelism to be exploited either at a low level (by scheduling statements within loops, for example) or at the level of pipelined or parallel processes. The ability to compile software algorithms directly to the FPGA makes such cost/benefit analysis a more efficient, less risky process.