Section 8.4. Compiling To Hardware

8.4. Compiling To Hardware

After simulating its functionality using standard desktop tools, we are ready to implement the application on a mixed FPGA/processor target. We chose a Xilinx MicroBlaze-based FPGA target for this test, selecting the Virtex-II MicroBlaze Development Kit (available from Memec Design) as our reference system. The Memec kit includes a hardware reference board populated with a Virtex II FPGA and various peripheral interfaces, as well as all development tools needed to compile and synthesize hardware and software applications (consisting of HDL source files for hardware and C source files for software) to the FPGA target. When combined with the Impulse C compiler, this kit provided us with everything needed to compile and execute the test application from our C language source files.

The following steps (which are presented in detail in the next chapter) were required to compile the encryption test application to the target:

1.	The Xilinx MicroBlaze Platform Support Package was selected from within the Impulse tools, and C source files representing the application were processed, resulting in approximately 6,500 lines of generated RTL and related hardware/software interface source files.
2.	A new project was created using the Xilinx Platform Studio tools. A MicroBlaze platform was generated in Platform Studio, including the necessary peripherals such as a serial port, RAM controller, and so on.
3.	The generated hardware and software files were exported from the Impulse tools to the newly created Platform Studio project.
4.	Platform Studio was used to connect the generated hardware process (the Impulse C encryption process) to the MicroBlaze processor via the MicroBlaze FSL high-speed bus.
5.	The complete system, including the MicroBlaze processor and the generated encryption-related hardware, was synthesized using the Xilinx tools, which are invoked from within Xilinx Platform Studio.
6.	The software portions of the application (the legacy C version of the encryption algorithm and the test functions, including main) were imported into the Platform Studio project and compiled.
7.	A bit file was generated using the Xilinx tools and downloaded to the platform (via a JTAG interface cable) for execution.