Background

Over the years , power management control has migrated to the operating system in many platforms. System and I/O devices designers provide registers for the OS to control power at the function, device, bus, and system levels.

• Hardware registers for power management reside in chipsets and IO devices (e.g. PCI).

• Transitions in power state typically occur under software control as chipset hardware detects inactivity time-outs and interrupts the processor, which in turn executes the power management routines.

Some buses, such as PCI, define power management registers for each function that can be programmed to cause changes in power states and to enable wakeup, if supported (e.g. modem wake-up). Other buses like the ISA bus appeared before power management was widely implemented, making it difficult to implement power management. That is, lacking a standard set of configuration registers, an ISA device doesn't play well in either power management or plug-and-play schemes. The HT specification defines the signals LDTSTOP# and LDTREQ# (LDT Request) to support power management, but does not define a standard set of registers for meeting low power requirements. Instead, to meet platform power management requirements, devices can gate clocks, stop PLLs, and power down portions of the device after the LDTSTOP# signal is asserted. Remote wakeup can be implemented using LDTREQ#.

In addition to LDTSTOP# and LDTREQ#, the STPCLK and STOP_GRANT messages can also be used to support power management activities.