PowerTheater [1]

[1] Courtesy of Sequence Design, Inc. Portions reprinted with permission.

PowerTheater is a comprehensive set of power tools that create maximum power efficiency for SOC designs at the architectural level, RT level, and gate level. This family of full-chip power tools can be used throughout the IC design process. PowerTheater products (PowerTheater Analyst and PowerTheater Designer) analyze, display, and help the user to reduce the power for the whole chip and each individual module. These tools interface directly with Verilog and VHDL simulators to capture behavioral and gate-level simulation activity.

Key Features

  • SOC RTL power analysis

  • Flexible and easy-to-use RTL power optimization

  • Handles clock, memory, data- path control logic, and I/O

  • De facto industry standard for RTL power design

  • Versatile graphical analysis environment

  • Accurate gate-level power verification


  • Sun Solaris

  • HP UX

Figure A.1. PowerTheater Block Diagram


Memory Configuration
  • 512 Megabytes minimum

  • 1 Gigabyte recommended

Input Formats
  • Verilog

  • VHDL

  • ALF vendor libraries

  • Synopsys Liberty (.LIB) vendor libraries

  • OLA vendor libraries

Output Files
  • ASCII report files

  • PLI and VPI for Verilog simulators

  • FLI interface for VHDL

  • VCD supported


From ASICs to SOCs. A Practical Approach
From ASICs to SOCs: A Practical Approach
ISBN: 0130338575
EAN: 2147483647
Year: 2003
Pages: 61

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