6.3 Filter architectures and design methods


6.3 Filter architectures and design methods

As we have seen in Section 6.2, the most common types of filter response required are lowpass and bandpass, but occasionally a demand arises for other types; highpass, band-reject and allpass, together with equaliser functions. The components available for filter design depend on the IC technology used; for current designs, pure CMOS is by far the most popular technology, and further discussion will focus on CMOS circuit techniques. Bipolar technologies have been extensively used also, and offer some performance benefits in that bipolar devices have greater transconductance and lower noise for a given bias current. From the designer's viewpoint, BiCMOS would appear to offer the best choice of implementations. All these technologies offer resistors and capacitors with good performance, however inductors are only useable for applications in the gigahertz range. To design lower frequency filters with complex poles and zeros in their response without inductance requires the use of active circuits with gain. The other necessary requirement for integrated filter designs is tunability, which requires at least one type of component to be made variable. This can be achieved by using a component with a value dependent on bias voltage or current. An alternative to electrically tuneable circuit elements is the use of switched arrays, in which component variation in discrete steps is achieved. This is a technique well suited to digital control; it is also useful for extending the tuning range.

At the system level, the required response of a filter may be specified in a number of ways. The designer is usually interested in the amplitude response with changing frequency, and also the response in the time domain. This latter can be expressed either in terms of phase response, or group delay versus frequency. An idealised bandpass filter response is shown in Figure 6.3a; here the amplitude response is unity inside the passband, but zero beyond the upper and lower cut-off frequencies fcL and fcU. The same filter would have a constant group delay (or a linearly increasing phase lag) with changing frequency. In practice, as in Figure 6.3b it is only possible to realise filter responses that approximate to the ideals; different approximations attempt to optimise one aspect of filter response, or to achieve the best compromise between a number of conflicting requirements. Thus many different approximating functions have been devised; the Chebyshev and elliptic functions aim to approach the ideal ‘brick wall’ amplitude response, the Butterworth response achieves maximum gain flatness within the passband, and the Bessel and linear phase responses approximate a constant group delay. Procedures are available to select the optimum filter response for a particular application from a catalogue [6]. Numerical methods can also be used to optimise a practically achievable filter function to meet a specific set of requirements [7].

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Figure 6.3: (a) Ideal bandpass filter response; (b) practically realisable response

The response of a continuous-time filter is usually specified as a polynomial function of the complex frequency operator s:

In order to be practically realised, restrictions are that m n, ai, bi are real, and bi are positive [8]. This function can be factorised to give:

where pj are the poles of H(s), that is, the roots of D(s), and zi are the zeros of H(s), the roots of N(s). In general, zi and pj are either real, or exist in complex conjugate pairs. The filter response is therefore defined as a set of poles and zeros. Once the designer has selected a suitable response of this form, several different filter circuit architectures are available for implementation. The most important architectures are the second-order cascade, multiple loop feedback structures, and simulations of passive LCR ladders. These are discussed in the following sections.

6.3.1 Second-order cascade architecture

Any transfer function of the form (6.2), and of order n, can be factorised into a series of N second-order responses of the form:

where n = 2N. Where the order n is odd, an additional first-order function t(s) is required. The complete transfer function can then be expressed as

where t(s) = 1 if the transfer function is even order. This can be physically realised as a cascade of circuit blocks, each implementing a second-order response, with a single first-order section if required. The stucture is shown in Figure 6.4. Each second-order block is often called a ‘biquad’, due to the biquadratic form of equation (6.3). Each biquad implements two complex conjugate poles, and none, one or two zeros, depending on requirements. The design of the biquads must be such that the input of each biquad can be connected to the preceding output without loading effects.

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Figure 6.4: Second-order cascade structure

A vast range of biquad circuits have been devised [8, 9]. Single amplifier biquads (SABs) consist of a resistor–capacitor network with an amplifier embedded in it. Although SABs have the advantage of lower power consumption due to having only a single active device, they are little used for integrated filters. This is because SABs have higher sensitivity to component tolerances and integrated passive components require a larger chip area than active devices. Also, tuning the transfer function of most SABs is more difficult than is the case for two integrator loop biquads, since there are several different types of components used in the circuit, each subject to large, uncorrelated mismatches. Other biquads are based on a feedback loop containing a pair of integrators. One possible two-integrator loop configuration is shown in Figure 6.5; this is a representation of the Tow–Thomas active RC biquad.

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Figure 6.5: Block diagram of Tow–Thomas biquad

The transfer functions at the outputs of this block diagram are:

The transfer function at V2 is a lowpass function with two complex conjugate poles; a bandpass function is available at V1, with a zero along with the same pole pair. This simple biquad is therefore restricted to lowpass and bandpass filters based on all-pole filter responses. More complex implementations of the two-integrator loop allow the designer to include arbitrary zeros in the filter response. One method to obtain zeros in the biquad response is by taking a weighted sum of the input and outputs of Figure 6.5, as shown in Figure 6.6. An alternative approach is to inject the input signal into all the internal nodes of the biquad as in Figure 6.7.

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Figure 6.6: Biquad with output summation

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Figure 6.7: Biquad with input distribution

Both these circuits can implement the arbitrary second-order filter function of equation (6.3) by suitable choice of the coefficients kij; for Figure 6.6:

and for Figure 6.7:

The circuit of Figure 6.7 is especially desirable, since the coefficients controlling zeros and poles are completely independent of each other.

The complete second-order cascade filter is designed in modular form, using a selection of biquads suitable to realise the required poles and zeros in the filter response. Any response can be realised in many different ways; in principle, the set of biquads could be cascaded in any order without changing the overall response. However, considerable design effort is required to optimise the design with respect to signal-to-noise ratio and dynamic range. Pole–zero pairing is important in optimising the dynamic range of each biquad [8–10]; if the pole and zero pairs in any one biquad are at widely different frequencies, the gain of the biquad will vary widely over the operating frequency range. This restricts the range of input signals which can be applied, since a large signal will cause overloading at frequencies where the gain is high, while small signals applied at the minimum-gain frequencies will have poor signal-to-noise ratios. The poles and zeros are therefore usually distributed between the biquads so as to minimise the frequency separation. The sequence in which the biquads are cascaded has a major effect on the dynamic range of the filter. If a biquad with a large-amplitude peak in its response is included as the first stage of the cascade, subsequent stages may be overloaded by signals close to this peak frequency. As a general rule, this results in biquads being cascaded in ascending order of Q factor [9].

The second-order cascade offers the benefits of ease of design and flexibility. This configuration is also easy to tune, since each second-order block operates independently of others in the cascade, and so can be tuned separately without mutual interaction. However, the sensitivity of the second-order cascade is higher than for the other types of filter implementation described below. Also, at high frequencies, it is difficult to achieve sufficient isolation between biquads to avoid loading effects and interdependence of tuning.

6.3.2 Multiple-loop feedback architecture

The principle of the two-integrator loop can be extended to a cascade of a larger number of integrators with multiple feedback paths. A high-order filter function can then be realised directly without dividing it into second-order sections. The advantage this approach brings is that sensitivity is reduced [8, 11].

A general multiple loop feedback (MLF) filter configuration is shown in Figure 6.8. It consists of a cascade of integrators, with feedback paths which may connect between any of the integrator outputs and inputs. For a high-order filter containing several integrators, a very large number of permutations of feedback path configurations exist. Normally, only a small proportion of the possible feedback paths are implemented, since this leads to a simplified design without reducing the functionality of the circuit.

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Figure 6.8: General MLF filter structure

Special cases of the general MLF structure are the follow-the-leader feedback (FLF) structure of Figure 6.9, where all integrator outputs are summed at the input of the first integrator, and the IFLF (inverse follow-the-leader feedback) structure of Figure 6.10, where feedback to all integrator inputs is taken from the final integrator output in the cascade. A further important special case is the ‘leap-frog’ structure, used to simulate LC ladder filter structures; this is discussed in the following section.

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Figure 6.9: FLF structure

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Figure 6.10: IFLF structure

As in the case of the simple two integrator loops of the previous section, the MLF structures above realise frequency responses containing only poles. Also as in the case of the second-order circuits, input distribution and output summation can be used to introduce zeros in the response.

The advantage of MLF filter configurations in general is that they offer lower sensitivity than the second-order cascade. Drawbacks are that because all components in the filter interact to generate the filter transfer function, tuning any single component will affect all the poles and zeros of the response. This makes on-chip tuning of these filters relatively difficult; in practice, this difficulty is usually avoided using the master–slave technique described in Section 6.4.3. High-frequency parasitics give rise to problems with MLF filters having feedback paths which extend around a large number of integrators, such as the FLF and IFLF above. An ideal integrator will have a phase shift between output and input of exactly 90 . In real integrators, parasitic circuit effects will give rise to an actual phase shift which leads or lags slightly the nominal 90 . This ‘excess phase’ gives rise to severe Q-enhancement effects as will be discussed in Section 6.4.1, and cascading several integrators within any one feedback loop will lead to an accumulation of excess phase. Parasitic feed-forward via the feedback paths also leads to distortion of the filter transfer function.

6.3.3 LC ladder simulation

Many design techniques have been developed for passive LCR ladder filters. These filters have low sensitivity, so are attractive for integrated filter implementation, but usually not practical, except at very high frequencies, because of the very restricted availability of integrated inductors. However, circuit techniques are available which simulate the operation of LC filters using active devices, and as a result share the same design techniques and low sensitivity. The component substitution approach to LC ladder simulation uses active circuits which simulate the behaviour of inductance to substitute for actual inductors. A different approach is to simulate the voltages and currents in the passive LC circuit using active integrators. Both these approaches lead to broadly equivalent results.

The component substitution technique begins with a passive LCR design, such as the lowpass filter of Figure 6.11. The inductors are then replaced by a two-terminal circuit which has the same relationship between voltage and current as the inductors it replaces. One such circuit using a gyrator composed of operational transconductance amplifiers, in conjunction with a capacitor, is shown in Figure 6.12.

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Figure 6.11: Lowpass LC ladder

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Figure 6.12: Simulated inductance

Simple analysis shows that the impedance between the terminals of this circuit is:

Thus the circuit behaves as an inductance L = C/g1g2. Replacing all the inductors in Figure 6.11 with the gyrator circuit with suitably dimensioned values of transconductance and capacitance will clearly result in an active filter with the same transfer function as the prototype. The resulting circuit is shown in Figure 6.13.

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Figure 6.13: Ladder filter using gyrators

Another feature of the circuit of Figure 6.13, in addition to the elimination of inductors, is that the impedances in the series branches of the ladder have been transformed into shunt impedances with one terminal connected to ground. Modifying the circuit topology in this way is often useful, since it simplifies implementation of the circuit; in this case, grounded capacitors are less subject to parasitic effects. A range of similar circuit transformations can be used to modify the filter to produce the most practical and economic realisation, for example to minimise the numbers of active elements required. The inductance simulating gyrator circuit has used operational transconductance amplifiers as an example, and is a popular circuit technique (see Section 6.3.4). However, many other circuit techniques can also be used to realise gyrators; for example op-amp-RC techniques [8].

A different approach to realising an active circuit with the same transfer function as a passive ladder circuit is to simulate the signals at different points within the ladder circuit. The voltages across the shunt arms, and currents in the series arms of the LC ladder prototype of Figure 6.11 are given by

Each of these equations is the integrated sum of two voltages or currents; a circuit which generates the same overall transfer function can therefore be made up of integrators and summers, as in Figure 6.14.

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Figure 6.14: Leap-frog structure

This circuit is a special case of the multiple loop feedback circuits of the previous section; due to the feedback paths between alternate integrators, it is called the ‘leap-frog’ (LF) configuration. In Figure 6.11 the signals within the circuit are a mixture of voltages and currents. However, in practice it is more convenient to scale the signals such that all signals are either voltages or currents [12, 13].

Because these types of filter are derived from passive LCR prototypes, the design techniques developed for the passive filters can be utilised to generate active filters via simulation techniques. Further scaling of gain and impedance is also required to give practical component values, and to optimise dynamic range, as in the case of the second-order cascade. Although simple all-pole lowpass filters have been used in the illustrations above, it is possible to simulate any type of response that can be realised using LCR ladder filters [8, 13]. By modifications to the basic LF structure, it is also possible to realise responses that are not possible with the passive ladder structure, such as equalisers [14]. Although the inductor substitution and LF ladder simulation have been presented as different techniques, it can be shown that the two approaches give equivalent results, and yield the same circuit under certain conditions. Compared to the FLF and IFLF multiple loop feedback structures, the feedback paths in LF structures only enclose two integrators, making them less affected by excess phase in the integrators and so more suitable for high-frequency applications.

6.3.4 OTA-C filters

OTA-C filters utilise two types of component – operational transconductance amplifiers (OTA), and capacitors. Filter behaviour is determined by the open-loop transconductance of the OTAs, hence these are also known as gm-C filters. The OTA operates as a voltage-controlled current source, with differential inputs; ideally, it has infinite input and output impedances and the output current is linearly proportional to the differential input voltage. The basic building block for filter design is the integrator shown in Figure 6.15a. The transfer function of this integrator is

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Figure 6.15: (a) gm-C integrator, and (b) balanced gm-C integrator

i.e. the circuit is a lossy integrator. If g2 is eliminated, a lossless integrator results:

Since ideally the OTA outputs have infinite impedance, and so are unaffected by the output voltage, the summing function in OTA-C filter structures is performed simply by paralleling the outputs of two or more OTAs.

In practice, fully differential circuits such as in Figure 6.15b are almost universally used. The same transfer function is achieved, but the symmetrical structure has important advantages for noise rejection. Provided symmetry is maintained in the differential circuit, noise will be coupled equally into each differential pair of nodes. Thus, the noise will give rise to common-mode signals, but the symmetrical nature of the differential OTAs ensures a high degree of common-mode signal rejection. This is extremely important in mixed-signal IC design, where a high level of noise may be generated by digital circuits sharing the same substrate. A further benefit of differential structures is the cancellation of even-order distortion products, improving linearity.

An example of a gm-C biquad is shown in Figure 6.16, based on the Tow–Thomas active-RC biquad. Figure 6.16a shows a single-ended circuit, whilst Figure 6.16b is a balanced circuit with the same transfer function. Lowpass and bandpass filter functions are generated simultaneously:

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Figure 6.16: (a) Single-ended Tow–Thomas biquad; (b) balanced Tow–Thomas biquad

A feature of this and OTA-C filter circuits in general is that all the nodes in the filter circuit have capacitors connected to ground. This has the important advantage for high-frequency operation that no parasitic poles will be introduced by the effects of stray capacitance between these nodes and the substrate, which is at AC ground potential; instead, the stray capacitance will simply increase the total capacitance at that node. Capacitors fabricated on an IC have significant capacitance between the plates and the substrate, especially the bottom plate which is closest to the substrate. Where all capacitors have the bottom plate terminal grounded, no AC current flows into this stray capacitance. The top plate-substrate capacitance, which is much smaller, is absorbed into the total capacitance. Furthermore, the OTA itself normally has no high-impedance internal nodes. Therefore, the transfer function of the OTA-C structure has minimal parasitic poles, minimising problems caused by excess phase shift. The OTA-C technique is therefore well suited to high-frequency applications [15].

An example of a MLF OTA-C filter structure is shown in Figure 6.17. Normally, a higher-order filter structure is formed from a cascade of several integrators. Since the integrators have high input impedances, they may be directly cascaded. The feedback paths are implemented with additional OTAs.

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Figure 6.17: MLF gm-C filter structure

An elementary CMOS OTA using a differential pair is shown in Figure 6.18a. The transconductance is tuned by varying the bias current ID. However, this elementary OTA has severe performance drawbacks; in particular, poor linearity and low output impedance. At the same time, attempting to tune the transconductance over a wide range degrades performance, increasing noise and reducing bandwidth. Much effort has been expended on producing OTAs with a usefully wide tuning range while at the same time minimising non-ideal behaviour.

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Figure 6.18: Simple CMOS OTAs

In OTA-C integrators, in contrast to the closed-loop op-amp based designs, the OTA operates in an open-loop mode. Any non-linearity in the voltage-to-current transfer function of the OTA will give rise to distortion products in the output signal from the integrator. Therefore, a great deal of design effort has been expended on making the voltage-to-current conversion of the OTA as linear as possible. The main techniques used to improve linearity are non-linear term cancellation, and source degeneration [16–18].

The concept of the first technique is to sum the outputs of a number of non-linear transconductors in such a way that the non-linear terms cancel, leaving a residual linear transconductance. An example of this technique is the cross-coupled quad shown in Figure 6.18b. Assuming the drain current of the MOSFETs operating in the saturation region obeys a square-law relationship, i.e. ID = K(VGS VT)2, it can be shown that Iout = I2I1 = 2KVAVin. Thus the composite transconductance of the quad of MOSFETs is perfectly linear, and is also tuneable by varying VA. In practice, linearity will not be perfect, due to mismatches between devices making up the quad, and also because of imperfect compliance with the square law ID/VGS relationship. Noise will also increase. Similar linearization schemes have been developed based on the exponential IC/VBE relationship in bipolar transistor OTAs [19].

In the source degeneration technique, local negative feedback is applied to the OTA input devices. This is accomplished by the source resistors Rs in Figure 6.18c. This reduces the dependence of transconductance on input signal level, and so reduces distortion. However, it also reduces the dependence of transconductance on the bias current, so drastically reducing the range over which the transconductance can be tuned. To obtain a useful tuning range, the degeneration resistors are replaced by MOSFETs operating in the triode region. A number of circuit configurations are possible [16]. The MOSFETs are effectively voltage-controlled resistors, and the gain of the OTA is tuned by varying their gate bias voltage. The MOSFET channel resistance is itself a non-linear function of the applied signal voltage, so optimising the linearity of the source-degenerated OTA requires careful design and modelling. Adding source degeneration inevitably reduces the gain of the OTA, therefore to achieve the same transconductance as the non-degenerated OTA, larger transistors, higher bias current and greater chip area is required.

The other major defect of the simple OTA circuit is the finite output impedance. This is due to the dependence of the MOSFET drain current on the drain-source voltage. The output impedance can be greatly increased by isolating the input MOSFETs from changes in voltage at the output terminals. Three techniques for achieving this are shown in Figure 6.19.

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Figure 6.19: Increasing OTA output impedance: (a) cascode, (b) folded cascode and (c) current mirror

A simple cascode output is shown in Figure 6.19a; this has the drawback of reducing the input and output voltage swing that is possible while maintaining the MOSFETs in their active operating region. The folded cascode circuit of Figure 6.19b allows much larger signal voltage excursions. It also allows the output voltage to be more negative than the input voltage, so that no additional level shifting is required when a number of such OTAs are cascaded. The current mirror circuit of Figure 6.19c achieves a similar result to the folded cascode; additionally, more complex types of current mirror can be used to increase the output impedance further.

Further output transistors can be added to the current mirror of Figure 6.19c to provide multiple, identical outputs. These may be used to reduce the number of OTAs required in a filter; for example, in the MLF structure of Figure 6.17, the OTAs in the feedback paths could be eliminated by taking feedback from duplicate outputs of the integrator OTAs. A similar economy can be achieved by using OTAs with multiple pairs of inputs [17, 20]; this can be achieved by an OTA circuit with multiple input stages, the output being produced by summing the input stage currents.

6.3.5 MOSFET-C filters

MOSFET-C filters are extremely widely used for lower-frequency applications where low distortion is important. The MOSFET-C technique was derived from active-RC techniques; in discrete component designs, the useful frequency range of the active-RC filter is limited by parasitic capacitances to frequencies mostly below 1 MHz. However, in a fully integrated design, circuit parasitics can be reduced sufficiently to allow satisfactory performance at frequencies of 100 MHz or greater [15, 21]. As with other types of integrated filter, it is necessary to make components electrically tuneable to correct for component value variations.

To achieve this, the resistors of the active-RC design are replaced with MOSFETs operating in the triode region, where the channel acts as a variable resistance which is dependent on the gate and substrate bias voltages. The cut-off frequency and Q of the filter is tuned by varying the gate voltages. A MOSFET used in this way is usually called a MOS resistor. The basic active-RC integrator is shown in Figure 6.20a. Figure 6.20b shows a basic MOSFET-C integrator. Within the operating frequency range of the filter, the closed loop gain of the integrator is much smaller than the open-loop gain of the amplifier, so the usual benefits of high loop gain in reducing distortion are obtained. This makes it unnecessary for the amplifier to have a very linear transfer function, as is the case for gm-C filters. This also allows a large excursion of the input and output voltages to be utilised, maximising the upper limit of dynamic range, an important factor with the trend in falling supply voltages.

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Figure 6.20: Active-RC and MOSFET-C integrators

Practical MOSFET-C filters invariably use a balanced integrator structure, such as that shown in Figure 6.20c, due to Banu and Tsividis [22]. As well as the usual noise-reduction advantages of balanced circuits, this achieves the advantage of a high degree of cancellation of unwanted distortion products generated by the inherently non-linear MOS resistors. With small input signal levels, each op-amp input behaves as a virtual earth, and each MOS resistor as a linear resistor, as with the active RC integrator. With large input signals, the MOS resistor channel conductance is modulated by the applied signal voltage, and substantial, mostly second-order distortion products are present at the op-amp inputs. However, even-order distortion products are largely cancelled by the differential nature of the circuit. Thus while individual components of the MOSFET-C integrator are highly non-linear, the overall circuit can have high linearity, an example of externally linear, internally non-linear circuit behaviour.

The range over which the MOS resistors can be tuned in value depends on the magnitude of input signals and the range of gate control voltage available. High input signal levels will lead to the MOS resistors operating outside the triode region in some parts of the input waveform, causing increased distortion. A modification of the MOSFET-C integrator structure has been described by Czarnul [23]. As shown in Figure 6.20(d), an additional pair of cross-connected MOS resistors is added to the input of the integrator, which partially cancel the input current. The input structure is similar to that of a double-balanced mixer. The integrator gain is dependent on the ratios of the MOSFET resistances, and can be varied over a wide range by varying the differential bias voltage applied to the MOSFET gates. This circuit in principle has advantages in improving linearity, and also reducing the effects of parasitic MOSFET resistor capacitance at high frequency, although device mismatches reduce the improvement which can actually be achieved.

To a first-order approximation, the MOSFET-C integrator is unaffected by the parasitic capacitances associated with the capacitors and MOS resistors. The op-amp inputs are a virtual ground and so little AC current flows in the stray capacitance between the op-amp inputs and ground. Capacitances between the op-amp outputs and ground are driven by the low-impedance outputs; provided the loop gain is still sufficiently high, the transfer function of the integrator is unaffected. However, the input voltage and output impedance of the op-amp are finite, so stray capacitance will in fact produce parasitic poles at high frequencies. Also the open-loop gain of the amplifier will decrease at high frequencies.

A MOSFET-C biquad is shown in Figure 6.21. This is an implementation of the two integrator loop of Figure 6.5; the summing function is performed at the virtual earth nodes at the integrator inputs, by providing extra MOS resistors (R2, R3) in the feedback paths. Lowpass and bandpass functions are available from the circuit:

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Figure 6.21: MOSFET-C biquad

The same basic structure can be extended to higher-order MLF filters in a similar way to the gm-C structure of Figure 6.16.

The amplifier component of the MOSFET-C integrator may be a low output impedance operational amplifier, or it may be an operational transconductance amplifier with large gm, such that a high loop gain is achieved with the output loaded. Other types of amplifier may also be employed [24]. Achieving sufficient gain requires a multistage amplifier design, with frequency compensation to ensure adequate phase margin for closed-loop operation. A further requirement is for differential outputs to implement the balanced integrator structure. A typical balanced op-amp circuit is shown in Figure 6.22.

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Figure 6.22: Balanced op-amp

6.3.6 Active-LC filters

Classical passive LC filters have many advantages in signal processing; high operating frequencies, wide dynamic range and zero power consumption. However, the inductors required are difficult to integrate. On-chip inductors take the form of flat spirals using the upper metalisation layers of the IC, and become prohibitively large for values greater than a few nanohenries. But current IC technology has now extended the upper frequency limits of integrated transceivers well into the gigahertz range, where filter design with inductance values in this range is practical. The new limitation is the low Q that can be achieved; optimised inductor design gives Q values in the range 5–20 [15, 25]. This severely limits the range of filter responses which can be achieved. In spite of the low Q factors, integrated inductors are an essential component in many integrated transceiver functions, such as low-noise amplifiers, voltage controlled oscillators, and power amplifiers, so considerable research effort is being expended on improving integrated inductor performance.

The effective Q of integrated inductive components can be increased by cancelling the resistive losses of the inductors with active negative resistance generating circuits. In a passive network, Q may be defined as the ratio of the reactive to the resistive parts of the impedance of a component. Figure 6.23a shows a simple model of a lossy inductor with a Q of 6 at 2 GHz. The losses in the inductor are modelled as a series resistor. Clearly, if a circuit simulating a negative resistance of 8.4 Ω were connected in series with Figure 6.23a, then the losses of the inductor would be perfectly compensated. A parallel negative resistance Rp could also be used to cancel out the inductor losses at 2 GHz:

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Figure 6.23: Simple inductor model, and more realistic models of integrated spiral inductor

giving a value of 372 Ω. Practically, it is easier to generate this higher value of negative resistance, since active components of lower transconductance are required. However, a parallel negative resistor only gives exact compensation of series loss resistance at a single frequency, due to the dependence on ω of the effective parallel resistance. The behaviour of the integrated planar spiral inductor is substantially altered by large parasitics, in particular the distributed capacitance between the spiral metalisation and the substrate, and eddy currents induced in the substrate.

A more accurate equivalent circuit for a typical spiral inductor is shown in Figure 6.23b (from Reference 26). This component also has a Q of 6 at 2 GHz. The Q of this component, and that of the simple series model, are plotted against frequency in Figure 6.23c. No single compensating negative resistance can be connected to the network of Figure 6.23b that will exactly compensate the loss over a wide frequency range. Therefore, it is practically only possible to achieve Q compensation over a fairly narrow frequency range, and active-LC circuits are primarily of interest as narrowband bandpass filters. Several filters giving useful performance as RF bandpass filters have been described [27–29]

Circuits that generate negative resistance rely on positive feedback; for example the transconductance amplifier configuration of Figure 6.24a, in which

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Figure 6.24: (a) Negative resistance generator and (b) active LC filter section

OTA designs used for other types of active filter could be used for the transconductance in Figure 6.24a, however, due to the very high operating frequency of active-LC filters, the more complex amplifiers used for lower frequency applications are impractical due to their bandwidth limitations. Very simple tranconductance amplifier circuits, similar to those used for voltage controlled oscillators, are generally used, as in Figure 6.24b.

When the inductor is combined with a resonating capacitor, a second-order bandpass biquad results. Varying the bias current IQ in the active devices controls the transconductance gm, and therefore the negative resistance and Q of the filter. The resonant frequency of the filter is largely determined by the inductance and capacitance values. No means currently exist of tuning an integrated inductor, so the capacitance must be made variable to achieve frequency tuning. This can be accomplished using varactor diodes; unfortunately, these have rather limited tuning range, and also introduce additional losses and non-linearity into the circuit. Another method of tuning the resonating capacitor is to use switched capacitor arrays as will be described in Section 6.3.7. The main difficulty in implementing the switched array is to make the losses and parasitic capacitances in the array switches sufficiently small.

High-order active-LC filters are derived from passive LC prototypes. Integrated inductors with useably high Q are limited to a narrow range of values, so the best implementation is a coupled resonator structure as shown in Figure 6.25a, which can be designed using identical inductors. The shape of the filter response is defined by the Q of each LCR resonator, and the coupling coefficient between them. In the case shown, coupling between L1 and L2 is provided by the mutual inductance M12. The value of M12 is defined by the geometrical layout of the inductors, which is little affected by process variations. Therefore, inductors with the required value and coupling coefficient can be fabricated with relatively close tolerances, and the need for tuning the coupling coefficient is avoided.

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Figure 6.25: (a) Coupled resonator prototype, and (b) active LC fourth-order bandpass filter

A typical fourth-order bandpass active-LC filter is shown in Figure 6.25b. The loss in the two resonators of the prototype (RQ1, RQ2) is replaced by the net resistive loss in L1, L2, after partial compensation by the negative resistance generating circuits. IQ1 and IQ2 therefore control the Q of the resonators, and therefore the filter response shape. The filter centre frequency is tuned by the varactor diode bias voltages Vtune1 and Vtune2.

6.3.7 Switched arrays for filter tuning

Electrically tuned components exploit the dependence of a component parameter on a bias current or voltage, for example the dependence of gm on bias current for a transistor, the resistance of a MOS resistor on gate voltage, or the capacitance of a varactor diode on the reverse bias voltage. Electrical tuning is well suited to tuningcircuitsusinganaloguetechniquesandwherehightuningresolutionisrequired. Drawbacks are that the changing bias levels usually affect other aspects of the device performance: linearity, noise and parasitic components. This restricts the tuning range that can be achieved; typically, a 2 : 1 tuning ratio is obtained.

Switched arrays consist of an array of similar components, usually with a binary sequence of values, that are switched in or out of the circuit to produce an overall value which can be adjusted in discrete steps. Switched arrays have the advantage of making normally fixed components, such as passive resistors and capacitors, tuneable. It is possible to make the component value tuneable over a wider range than is practical with electrically tuned components.

An example is the switched capacitor array shown in Figure 6.26. A value of 031C in steps of C can be obtained by applying the appropriate digital control word. It is common to make each larger value from a combination of unit value capacitors, each with an identical switch, rather than capacitors and switches with scaled areas. This improves the matching between sections because all capacitors are subject to similar fringing and stray capacitances. Also, the series resistance of the switches scales exactly with the capacitance, maintaining the same parasitic time constant with different values of capacitance selected.

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Figure 6.26: Switched capacitor array

The switched array technique is especially suited to the MOS resistor, as shown in Figure 6.27; several MOSFETs are connected as a parallel array in which the devices being used have the control voltage applied to their gates. The resistors not required are deselected by biasing them into cut-off. Thus no additional switching devices are required in the signal path of the filter, reducing circuit parasitics. This technique is widely applied to MOSFET-C filters; it can also be applied to OTA-C filters using source degeneration. Transconductance can also be tuned using the switched array technique; an OTA is constructed using scaled current mirrors as the output stage. Individual current mirrors may be biased on or off by the digital control word, giving a binary scaled output current.

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Figure 6.27: MOSFET-C integrator with switched resistors

The switched array can be considered a form of digital-to-analogue converter, and so is inherently suited to tuning schemes using digital techniques. Switched capacitor arrays are used where extended tuning range is required, for example in multistandard transceiver designs, where a wide range of bandwidths may be required to suit different standards using the same circuit. However it is difficult to achieve high tuning resolution due to the large number of elements required, and the difficulty in accurately matching a wide spread of values in the array and between different arrays. Also, performance is degraded by switch parasitics, such as on resistance and stray capacitance. For these reasons, a combination of electrical tuning and switched arrays may be used for wide-range, high-resolution tuning [20].




Wireless Communication Circuits and Systems
Wireless Communications Circuits and Systems (IEE Circuits, Devices and Systems Series 16)
ISBN: 0852964439
EAN: 2147483647
Year: 2004
Pages: 100
Authors: Yichuang Sun

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