Organization of the Book

Chapter 1 discusses the OSI 7 Layer model in the context of software based implementations. It provides an overview of some of the issues in communications equipment, a foundation for building the software for these devices.

Chapter 2 details the various factors involved in software design for communications systems. It discusses host and embedded communications software requirements, including RTOS, protocol stack and hardware acceleration including design tradeoffs. Details of engineering software to work with and without hardware acceleration are also provided

Chapter 3 revisits layering in the context of software partitioning including why it is difficult to maintain strict layering. It outlines tasks, modules and their interface requirements.

Chapter 4 is a detailed description of protocol stacks and their implementation. State tables and their implementation, interfaces between protocol modules and management of protocol stacks are discussed in this chapter.

Chapter 5 provides the design issues with respect to tables used in communications software. Tables may be required for configuration, status and statistics and for protocol operation. Data structure allocation, design and access mechanisms for tables are outlined.

Chapter 6 provides a detailed view of buffer and timer management schemes in communications software design. It discusses the mbuf and STREAMS buffer schemes, discusses timer design including the use of a timer task and events.

Chapter 7 details management software design in communications systems. Management schemes, use of management protocol abstraction, saving and restoring configuration are some of the key issues covered in this chapter.

Chapter 8 is a discussion of issues with designing software for multi CPU and multi board systems. Popular multi board architectures, inter CPU messaging layer abstraction and redundancy are covered in this chapter.

Chapter 9 is a practitioner level view of communications software design and development. Details about the development phases and their outputs, hardware independent and COTS board testing are described in this chapter.