4.15. Large Page Support
Large page usage is primarily intended to provide performance improvements to applications that allocate a lot of memory and frequently access that memory. The performance improvement is mainly due to the reduced number of misses in the Translation Lookaside Buffer (TLB), a cache of virtual-to-physical translation. The number of misses can be reduced when the TLB is able to map a larger virtual memory range. This is possible due to the multiple page size support provided by most modern architectures. For example, the 32-bit Intel architecture supports 4K and 4M (2M in PAE mode) page sizes; Itanium supports multiple page sizes 4K, 8K, 64K, 256K, 1M, 4M, 16M, 256M; SUN UltraSPARC supports 8K, 64K, 512K, 4M; and the 64-bit PowerPC (ppc64) supports 4K, 64K, 16MB, and 16GB.
The Linux 2.6 kernel has built-in support for hugetlbpage (the term used by the Linux community for large page). However, how applications can take advantage of the large page support in Solaris and Linux is slightly different. At the time of this writing, Linux applications can only obtain large page support via the mmap and System V shared memory system calls. More information on Linux's large page support is provided in Chapter 3.