Types of IO Buses


Types of I/O Buses

Since the introduction of the first PC, many I/O buses have been introduced. The reason is simple: Faster I/O speeds are necessary for better system performance. This need for higher performance involves three main areas:

  • Faster CPUs

  • Increasing software demands

  • Greater multimedia requirements

Each of these areas requires the I/O bus to be as fast as possible.

One of the primary reasons new I/O bus structures have been slow in coming is compatibilitythat old catch-22 that anchors much of the PC industry to the past. One of the hallmarks of the PC's success is its standardization. This standardization spawned thousands of third-party I/O cards, each originally built for the early bus specifications of the PC. If a new high-performance bus system was introduced, it often had to be compatible with the older bus systems so that the older I/O cards would not be obsolete. Therefore, bus technologies seem to evolve rather than make quantum leaps forward.

The PCI Bus

In early 1992, Intel spearheaded the creation of another industry group. It was formed with the same goals as the VESA group in relation to the PC bus. Recognizing the need to overcome weaknesses in the ISA and EISA buses, the PCI Special Interest Group was formed.

The PCI bus specification was released in June 1992 as version 1.0 and since then has undergone several upgrades. Table 5.2 shows the various releases of PCI.

Table 5.2. PCI Specifications

PCI Specification

Released

Major Change

PCI 1.0

June 1992

Original 32-/64-bit specification.

PCI 2.0

April 1993

Defined connectors and expansion boards.

PCI 2.1

June 1995

66MHz operation, transaction ordering, latency changes.

PCI 2.2

January 1999

Power management, mechanical clarifications.

PCI-X 1.0

September 1999

133MHz operation, addendum to 2.2.

Mini PCI

November 1999

Small form factor boards, addendum to 2.2.

PCI 2.3

March 2002

3.3V signaling, low-profile add-in cards.

PCI-X 2.0

July 2002

266MHz and 533MHz operation, support for the subdivision of 64-bit data bus into 32-bit or 16-bit segments for use by multiple devices, 3.3V/1.5V signaling.

PCI Express 1.0

July 2002

2.5Gbps (gigabits per second) per lane per direction, using 0.8V signaling, resulting in 250MBps per lane. Designed to eventually replace PCI 2.x in PC systems.

PCI Express Mini Card

June 2003

Small form factor boards, addendum to PCI Express.


The PCI bus often is called a mezzanine bus because it adds another layer to the traditional bus configuration. Systems that integrate the PCI bus became available in mid-1993 and have since become a mainstay in the PC. In 1996, laptops adopted the CardBus standard, which is essentially a mobile hot-pluggable version of PCI. The Mini PCI standard became available in 1999, allowing laptops to accept internally replaceable PCI cards as well.

Information typically is transferred across the PCI bus at 33MHz 32 bits at a time. The bandwidth is 133MBps, as the following formula shows:

33.33MHz x 4 bytes (32 bits) = 133MBps

The PCI specification identifies three board configurations, each designed for a specific type of system with specific power requirements; each specification has a 32-bit version and a longer 64-bit version. The 5V specification is for stationary computer systems (using PCI 2.2 or earlier versions), the 3.3V specification is for portable systems (also supported by PCI 2.3), and the universal specification is for motherboards and cards that work in either type of system. The 64-bit versions of the 5V and universal PCI slots are found primarily on server motherboards. The PCI-X 2.0 specifications for 266 and 533 versions support 3.3V and 1.5V signaling; this corresponds to PCI version 2.3, which supports 3.3V signaling.

Another important feature of PCI is the fact that it was the model for the Intel PnP specification. Therefore, PCI cards do not have jumpers and switches, and are instead configured through software. True PnP systems are capable of automatically configuring the adapters, whereas non-PnP systems with ISA slots must configure the adapters through a program that is usually a part of the system CMOS configuration. Since late 1995, most PC-compatible systems have included a PnP BIOS that allows the automatic PnP configuration. Although laptops cannot accept normal PCI cards, most have a single internal Mini PCI card slot and one or two external CardBus slots.

PCI Express, a new version of PCI, was approved in July 2002, and a Mini Card version suitable for laptops called ExpressCard was approved in June 2003. PCI Express is a very fast serial bus design that is backward compatible with current PCI parallel bus software drivers and controls. This new bus specification was designed to initially augment and eventually replace the existing PCI bus. For more information on PCI Express, I recommend consulting the PCI-SIG website (www.pcisig.org).

Accelerated Graphics Port (AGP)

Intel created AGP as a new bus specifically designed for high-performance graphics and video support. AGP is based on PCI, but it contains several additions and enhancements and is physically, electrically, and logically independent of PCI. Unlike PCI, which is a true bus with multiple connectors (slots), AGP is more of a point-to-point high-performance connection designed specifically for a video card or processor in a system because only one AGP device is allowed.

Most laptops do not have a standard AGP slot as desktop systems do. Instead, they normally integrate the AGP video processor on the motherboard or as part of the motherboard chipset. Some, however, have specialized slots for proprietary video card devices. Even if the video is integrated, it acts exactly as would a card plugged into a standard AGP or PCI slot. For more information on possible graphics chipset upgrades for laptops, refer to Chapter 11, "Graphics and Sound."

See "User-Upgradeable Laptop Graphics Modules," p. 558.


Intel originally released the AGP specification 1.0 in July 1996 and defined a 66MHz clock rate with 1x or 2x signaling using 3.3V. AGP version 2.0 was released in May 1998 and added 4x signaling as well as a lower 1.5V operating capability.

The latest revision for the AGP specification for PCs is AGP 8x, otherwise called AGP 3.0. AGP 8x defines a transfer speed of 2,133MBps, which is twice that of AGP 4x. The AGP 8x specification was first publicly announced in November 2000. Although AGP 8x has a maximum speed twice that of AGP 4x, the real-world differences between AGP 4x- and 8x-compatible devices with otherwise identical specifications are minimal. However, many 3D chipsets that support AGP 8x are also upgrading memory and 3D graphics core speeds and designs to better support the faster interface.

AGP is a high-speed connection and runs at a base frequency of 66MHz (actually 66.66MHz), which is double that of standard PCI. In the basic AGP mode, called 1x, a single transfer is done every cycle. Because the AGP bus is 32 bits (4 bytes) wide, at 66 million times per second, AGP 1x can transfer data at a rate of about 266MBps. The original AGP specification also defines 2x mode, in which transfers are performed twice every cycle, resulting in 533MBps. Using an analogy in which every cycle is equivalent to the back-and-forth swing of a pendulum, the 1x mode is thought of as transferring information at the start of each swing. In 2x mode, an additional transfer would occur every time the pendulum completed half a swing, thereby doubling performance while technically maintaining the same clock rateor, in this case, the same number of swings per second. The AGP 2.0 specification added the capability for 4x transfers, in which data is transferred four times per cycle and equals a data-transfer rate of 1,066MBps. AGP 3.0 added 8x transfers (eight times per cycle), resulting in a transfer rate of 2,133MBps. Most newer AGP cards now have support for the 4x standard as a minimum, and the latest chipsets and graphics controllers support AGP 8x. Table 5.3 shows the differences in clock rates and data-transfer speeds (bandwidth) for the various AGP modes.

Table 5.3. AGP Modes Showing Clock Speeds and Bandwidth

AGP Type

Bus Width (Bytes)

Bus Speed (MHz)

Data Cycles per Clock (MBps)

Bandwidth

AGP 1x

4

66

1

266

AGP 2x

4

66

2

533

AGP 4x

4

66

4

1066

AGP 8x

4

66

8

2133


Because AGP is independent of PCI, processing graphics on the AGP video bus frees up the PCI bus for more traditional input and output, such as for SCSI, FireWire, or USB controllers; sound cards; network interface cards; and so on.

Besides faster video performance, one of the main reasons Intel designed AGP was to allow the video chipset to have a high-speed connection directly to the system RAM, which would enable a reasonably fast and powerful video solution to be integrated at a lower cost. AGP allows a video processor to have direct access to the system RAM, either enabling lower-cost video solutions to be directly built in to a motherboard without having to include additional video RAM or enabling an AGP video chip to share the main system memory. High-performance video processors will likely continue the trend of having more memory directly connected (even if it is integrated into the motherboard), which is especially important when running high-performance 3D video applications.

AGP allows the speed of the video processor to pace the requirements for high-speed 3D graphics rendering, as well as full-motion video on the PC.

PCI Express

During 2001, a group of companies called the Arapahoe Work Group (led primarily by Intel) developed a draft of a new high-speed bus specification code-named 3GIO (third-generation I/O). In August 2001, the PCI Special Interest Group (PCI-SIG) agreed to take over, manage, and promote the 3GIO architecture specification as the future generation of PCI. In April 2002, the 3GIO draft version 1.0 was completed, transferred to the PCI-SIG, and renamed PCI Express. Finally in July 2002, the PCI Express 1.0 specification was approved. The first chipsets, motherboards, and systems featuring PCI Express slots were released in June 2004.

The original 3GIO code name was derived from the fact that this new bus specification was designed to initially augment and eventually replace the previously existing ISA/AT-Bus (first-generation) and PCI (second-generation) bus architectures in PCs. Each of the first two generations of PC bus architectures was designed to have a 10- to 15-year useful life in PCs. In being adopted and approved by the PCI-SIG, PCI Express is now destined to be the dominant PC bus architecture designed to support the increasing bandwidth needs in PCs over the next 1015 years.

The key features of PCI Express include

  • Compatibility with existing PCI enumeration and software device drivers.

  • Physical connection over copper, optical, or other physical media to allow for future encoding schemes.

  • Maximum bandwidth per pin allows small form factors, reduced cost, simpler board designs and routing, and reduced signal integrity issues.

  • Embedded clocking scheme enables easy frequency (speed) changes as compared to synchronous clocking.

  • Bandwidth (throughput) increases easily with frequency and width (lane) increases.

  • Low latency, which makes it suitable for applications that require isochronous (time-sensitive) data delivery, such as streaming video.

  • Hot-plugging and hot-swapping capabilities.

  • Power management capabilities.

PCI Express is another example of how the PC is moving from parallel to serial interfaces. Earlier generation bus architectures in the PC have been of a parallel design, in which multiple bits are sent simultaneously over several pins in parallel. The more bits sent at a time, the faster the bus throughput is. The timing of all the parallel signals must be the same, which becomes more and more difficult to do over faster and longer connections. Even though 32 bits can be transmitted simultaneously over a bus such as PCI or AGP, propagation delays and other problems cause them to arrive slightly skewed at the other end, resulting in a time difference between when the first and last of all the bits arrive.

A serial bus design is much simpler, sending 1 bit at a time over a single wire, at much higher rates of speed than a parallel bus would allow. Because this type of bus sends the bits serially, the timing of individual bits or the length of the bus becomes much less of a factor. And by combining multiple serial data paths, even faster throughputs can be realized that dramatically exceed the capabilities of traditional parallel buses.

PCI Express is a very fast serial bus design that is backward compatible with current PCI parallel bus software drivers and controls. In PCI Express, data is sent full duplex (simultaneously operating one-way paths) over two pairs of differentially signaled wires called a lane. Each lane allows for about 250MBps throughput in each direction, and the design allows for scaling from 1 to 2, 4, 8, 16, or 32 lanes. For example, a single lane connection uses two pairs of differential signal lines (4 wires total) allowing a throughput of 250MBps in each direction, while a high-bandwidth configuration with 16 lanes uses 32 differential signal pairs (64 wires) allowing a throughput of 4,000MBps in each direction. Future proposed increases in signaling speed could double the throughput over the current design.

Laptops featuring PCI Express implement an x16 connection to video internally on the motherboard and one or two x1 connectors in the form of ExpressCard sockets on the side of the system. ExpressCard sockets have only 26 pins and carry both x1 PCI Express (250MBps) signals as well as USB 2.0 (60MBps), and are significantly smaller and faster than PCI-based 68-pin CardBus (133MBps) sockets.

PCI Express uses an IBM-designed 8-bitto10-bit encoding scheme, which allows for self-clocked signals that allow future increases in frequency. The starting frequency is 2.5GHz, and will scale up to 10GHz in the future, which is about the limit of copper connections. By combining frequency increases with the capability to use up to 32 lanes, PCI Express is capable of supporting future bandwidths up to 32GBps.

In addition to replacing PCI, PCI Express is designed to augment and eventually replace many of the buses currently used in PCs, including the existing Intel hub architecture, HyperTransport, and similar high-speed interfaces between motherboard chipset components. Additionally, it will replace video interfaces such as AGP and act as a mezzanine bus to attach other interfaces, such as Serial ATA, USB 2.0, 1394b (FireWire or iLink), Gigabit Ethernet, and more.

Because PCI Express can be implemented over cables as well as onboard, it can be used to create systems constructed with remote "bricks" containing the bulk of the computing power. Imagine the motherboard, processor, and RAM in one small box hidden under a table, with the video, disk drives, and I/O ports in another box sitting out on a table within easy reach. This enables a variety of flexible PC form factors to be developed in the future without compromising performance.

Don't expect PCI Express to replace PCI or other interfaces overnight, however. System developers will most likely continue to integrate PCI, AGP, and other bus architectures into system designs for several more years. Just as with PCI and the ISA/AT-Bus before, there will likely be a long period of time during which both buses will be found on motherboards. Gradually, though, fewer PCI and more PCI Express connections will appear. Over time, PCI Express will eventually become the preferred general-purpose I/O interconnect over PCI. I expect the move to PCI Express will be similar to the transition from ISA/AT-Bus to PCI during the 1990s.

The first desktop PCs using PCI Express emerged in June 2004, timed with the introduction of the first PCI Express chipsets and motherboards from Intel. PCI Express first appeared in new laptop systems starting in January 2005, timed with the release of the first mobile PCI Express chipsets. Since then, PCI Express has been catching on rapidly, in that most new systems introduced since those dates incorporate PCI Express, but also still include PCI. This means that most new desktops can use both PCI Express and PCI cards, while most new laptops can use both ExpressCard and CardBus cards.

For more information on PCI Express, I recommend consulting the PCI-SIG website (www.pcisig.org).




Upgrading and Repairing Laptops
Scott Muellers Upgrading and Repairing Laptops, Second Edition
ISBN: 0789733765
EAN: 2147483647
Year: 2005
Pages: 180
Authors: Scott Mueller

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