4.2 Field-programmable analogue arrays (FPAA)

4.2 Field-programmable analogue arrays (FPAA)

An integrated circuit that can be programmed to implement analogue circuits using flexible analogue blocks and interconnection is known as an FPAA. Both circuit configuration and parameters are changeable using on-chip memories [4].

4.2.1 General architecture

Field-programmable analogue arrays contain an array of programmable function blocks (FB) or configurable analogue blocks (CAB), which can be reconfigured or reprogrammed for different analogue signal processing functions with the aid of the programmable interconnection network. Both the function block and interconnection network can be programmed by on-chip memory. The specially designed software for particular FPAA chips enables the user to design and simulate the analogue applications and then send/write the data to the FPAA hardware to program the device. The different chip's hardware is designed to facilitate the electrical evaluation of the design. The generic block diagram of an FPAA is shown in Figure 4.1 [3, 7, 21]. The routing memory stores a bit string which is used for the connectivity of the interconnection network, and the function memory stores a bit string which is used for function generation of the FB/CABs and fine tuning of function parameters. Interconnection networks can take the form of a tree, crossbar or datapath, which connect the FB/CABs and input/output signals for different given system requirements. Each FB/CAB can be programmed to implement some basic analogue functions such as adders, multipliers, amplifiers, integrators, etc. FB/CABs can be designed for both specialised and general-purpose FPAAs. The performance parameters such as the gain, frequency and Q are tuneable through controlling the transconductances/MOSFETs and capacitors in continuous ranges. Many on-chip tuning methods such as master–slave, PLL and adaptive tuning, can be used [37–39].

Figure 4.1: Generic FPAA architecture

4.2.2 Configurable analogue blocks (CABs)

The CAB is the main function block in FPAAs, and it can be configured to perform different analogue signal processing functions. Each of the CABs has three subcells: a programming register (PR), programming logic (PL), and a configurable analogue cell (CAC). The CAC's functions can be programmed digitally using a function word (FW). The parameter word (PW) can be used to program the characteristics (parameters) of the configured function. The desired connectivity between the CACs in different CABs is configured through the routing word (RW). The digital control word of each CAC is held in the respective PR. The entire PR makes a single shift register which can be loaded with the desired programming bit stream through one external pin of the FPAA. The PL carries a predefined mode of operations for different CAC configurations and routing networks which are configurable by the PR. The I/O blocks are arranged surrounding all the four sides of the array to provide the input and output interface for the chip. Figure 4.2 shows the block diagram of a CAB [7]. A specialised CAB may have a few different functions, whilst a general CAB can have many functions. General CABs are normally more complex than specialised CABs. CABs can be designed at transistor level or building block level. Building block level design using op-amps, OTAs, etc. is preferred in terms of chip size [2].

Figure 4.2: Configurable analogue block

4.2.3 CAD design procedure using FPAAs

FPAAs can be configured for different applications by configuring the CAB and interconnections with the help of CAD (computer-aided design) software. All commercial FPAA chips can be easily prototyped and reprogrammed using the software available with them. The commercially available FPAAs also have built-in IP (intellectual property) modules available in their software so that users can easily use the ready-made functions for their own design. The flowchart illustrated in Figure 4.3 [2] provides the CAD procedure, which can be used to implement an analogue circuit on to an FPAA. After finishing pre-study, top-level design and module specification of the project, the analogue module is simulated in the module implementation phase. A GUI-based schematic editor is used to generate a netlist from the desired analogue circuit. The schematic can be of many levels from behaviour down to transistor level depending on the synthesising capacity of the CAD tool. Based on the resources available on the FPAA chip, circuit simulation and synthesis can be done using the CAD tool. Then the circuit is placed and routed, and the original schematic is back annotated. Verification is performed to check if all design specifications are met. If not, the whole procedure can be repeated. When design specifications are met, a configuration bit string is generated by the CAD tool and downloaded onto the FPAA chip. The downloading is usually performed using the port of a computer; often the configuration can also be stored in an on-board EEPROM. If needed, a circuit change can be done in a very short time compared with the months it would take to redesign and fabricate a new ASIC [2].

Figure 4.3: CAD methodology using FPAA

4.2.4 General design issues for FPAA

The design of a CAB/FPAA is possible in both continuous-time and sampleddata domains. A sampled-data design uses switched-capacitor or switched-current techniques, and continuous-time design uses transconductors or op-amps. The continuous-time design has advantages in terms of bandwidth, power and chip area, but it has narrower ranges of programming parameters and is sensitive to device nonidealities. On the other hand, the sampled-data design has advantages in terms of programmability and insensitivity to device non-idealities, but it is limited to lowfrequency operation by the sampling frequency and often consumes more power and occupies a larger chip area due to the extra anti-aliasing and smoothing filters and sample and hold circuits. Technically, four-quadrant multipliers are easy to implement in continuous-time, but difficult in sampled-data domain. Also, noise due to clock signals is often a problem for sampled-data systems, but it does not exist for continuous-time systems. As widely tuneable active devices and on-chip tuning circuits are used, parameter ranges and performance accuracy have been enhanced. In modern FPAAs, continuous-time techniques are more often used and will become dominant for future high-frequency applications.

Other practical issues important for designing an FPAA include switching element parasitics, choice of voltage mode or current mode, configuration storage, performance specification, etc. The switching elements are used for interconnection of CABs. Non-idealities from switches such as the voltage drop across them, onresistance, non-linearity and parasitic capacitances are detrimental to the performance of the FPAA. These can be reduced by using subthreshold operation switches [4], transconductor switches [5] and buffered pass switches [3]. The design is possible in both voltage and current mode. Voltage-mode circuits use voltage signals, and current-mode uses current signals in operation. Typical examples of the former are continuous-time circuits using voltage amplifiers such as the op-amp-RC and MOSFET-C, and sampled-data switched-capacitor circuits; and for the latter, continuous-time circuits using current amplifiers such as current conveyer-based and log domain, and sampled-data switched-current circuits. Continuous-time OTA-C circuits can work in both voltage and current mode. Low power/voltage design is sometimes difficult in voltage mode, but it may be easily possible using current-mode techniques. Also, current-mode design may achieve higher bandwidth and larger signal swing.

4.2.5 Advanced circuit techniques for FPAA

The switched-capacitor (SC) technique is familiar to designers, and early FPAAs used this technique [11]. The op-amp-RC approach is another well-established method which has also been utilised in several FPAA designs [3–5]. More recent analogue design techniques are the switched-current (SI), log domain, MOSFET-C and OTA-C [35].

Switched-current circuits are suitable for low-cost or wideband applications in digital CMOS implementations compared with switched-capacitor circuits. Comparisons of switched-current filters and traditional switched-capacitor filters have been made, showing the advantages of the SI filters [16, 40]. SI circuits have been successfully used for video frequency signal processing. Further increase in the operating frequency may be difficult due to the sampling requirement.

Log domain circuits are based on the exponential function of bipolar or MOS transistors. Rather than linearising the transistor, this method directly uses the non-linear characteristic to synthesise linear circuits [17, 41]. The translinear and companding techniques are related [8, 17]. Recent effort has been put into implementation of log domain circuits using mainstream CMOS technology. Log domain filters are perhaps the most revolutionary development in the recent rapid development of filter theory. The frequency range of log domain CMOS circuits is restricted to a few MHz range, although bipolar circuits can be somewhat higher.

MOSFET-C filters result directly from active-RC filters with the resistor being replaced by the tuneable MOSFET [42–45]. One advantage is that the wealth of knowledge of active-RC design can be used directly. Use of balanced structures is particularly important for MOSFET-C circuit design. CMOS has been almost exclusively used for MOSFET-C filters in the literature with operation frequency typically in the MHz range. Recent research has shown that with MOSFET resistors and bipolar op-amps, BiCMOS can also be an attractive technology for high-frequency high dynamic range MOSFET-C filters [42]. An example of 120 MHz filters with an extended tuning range has been reported [43].

Whilst active-RC and MOSFET-C circuits utilise the high gain operational amplifier in closed loop form, OTA/gm-C circuits [46–55], which are dominant in high-frequency applications, use the tuneable transconductance amplifier in open loop form and do not use (MOSFET) resistors. Both voltage-mode and current-mode gm-C filters are available [34, 49, 50]. Automatic tuning is particularly important for gm-C circuits, as they are sensitive to parasitics. The dominant IC technology for gm-C circuits is CMOS, although BiCMOS, bipolar and GaAs have also been used. The CMOS gm-C technique is a most outstanding feature of modern analogue IC design. CMOS gm-C filters for the GHz range are emerging.

In modern analogue circuit design two key techniques have been widely used: the balanced structure and on-chip automatic tuning. Balanced architectures should be utilised for all kinds of circuits to eliminate even-order harmonic distortion and reduce coupling of noise from the power supply and digital circuits [32]. On-chip automatic tuning is crucial for fully integrated continuous-time filter design to overcome the effects of parasitics, temperature and environment changes [37]. Both frequency tuning and Q tuning may be needed.

Continuous-time ICs feature modern analogue circuit design for high bandwidth, low power and small chip applications such as computer hard disk drives [56, 57] and wireless communication transceivers [58–60]. The gm-C approach has overshadowed all the other competing methods for high-frequency applications and will be the main technique for some time in the future. Many IC technologies have been used in practical implementations, but CMOS has been the most popular due to the low cost and suitability for single-chip systems such as single-chip transceivers for Bluetooth, and will be so for some years to come.

4.2.6 FPAA applications

As described above the FPAA has a matrix of CAB, surrounded by a programmable interconnection and I/O structure. Common analogue signal processing functions such as offset removal, rectifiers, gain stages, comparators and first-order filters can be implemented using just one CAB. More complex functions such as high-order filters, oscillators, pulse-width modulators and equalisers can be implemented using two or more CABs. The circuit's configuration is held in on-chip memory, which is initialised on power-up from EPROM, or through the chip's microprocessor peripheral interface. General-purpose FPAAs are for general signal processing and can be used to prototype and design any analogue circuits or as many as possible [7, 25].

One particular application of the FPAA is in filter design. In recent years, the renewed interest in analogue, mixed-signal and RF circuits due to system on-chip design has led to new interest in research into high-frequency integrated analogue filters [32–36]. In fact, the high-frequency integrated analogue filter has become a key component in achieving ubiquitous communication and computing. For example, RF bandpass filter design with high Q is a challenge for single-chip transceivers in wireless communications. Linear phase filters/equalisers at higher frequencies for mass storage systems such as computer hard disk drives are an active topic.

The FPAA's application range spans most areas of electronic design, including data acquisition and control, automation, instrumentation and telecommunications. In these applications it will replace large areas of PCBs with a single component offering repeatable, drift-free performance and may save up to 90 per cent development time [23–25]. Application-specific FPAAs have been developed for some particular applications such as neural networks [1] and signal conditioning/monitoring. FPAAs can also be embedded in a system as part of the chip. For example, in almost all electronic systems containing analogue and digital circuits, there is a lowpass filter (LPF) for anti-aliasing filtering and a variable gain amplifier (VGA) for amplification and for relaxing the requirements for A/D converters. The combination of a LPF and a VGA can be seen in video signal processing systems, computer hard disk drive systems, instrumentation and control systems, and communication systems. This kind of so-called analogue frontend circuit (LPF and VGA) may be typically implemented using an FPAA. Potential applications of FPAAs in ubiquitous wireless transceivers will be discussed in detail in Section 4.6.