Section 5.1. I-UWB Signal Generators

5.1. I-UWB Signal Generators

The heart of any I-UWB system is some type of fast-rise time step or pulse generator. These pulse generators are used for both transmitting and receiving. I-UWB transmitters convert data bits directly to fast-rise time pulses. Matched filter correlation receivers must generate a template pulse that matches the incoming waveform.

Conventional transmitters, including UWB transmitters, employing Orthogonal Frequency Division Multiplexing (OFDM) typically generate a continuous wave (CW) signal and then modulate this signal in some fashion. The modulation modifies the signal amplitude, phase, and/or frequency. While this modulation can be characterized in both the time and frequency domain, it is common to do the analysis in the frequency domain. CW transmitter circuitry employs familiar frequency synthesizers, mixers, modulators, and amplifiers.

The circuits and techniques described in this section are typical of transmitters used for I-UWB communications and ranging. I-UWB transmitters generally employ quite different circuitry from that used in continuous wave transmitters. Circuits that generate fast-rise time pulses are common. The modulation tends to be related to pulse timing so it lends itself more to time domain analysis. It is difficult to amplify I-UWB pulses due to the peak powers involved. High-voltage pulser circuits are attractive. In addition, the limited bandwidth and interface mismatch of filters, amplifiers, and mixers distort fast-rise time pulses. The pulse generator is often part of or connected directly to the radiating element in an I-UWB transmitter.

5.1.1. Avalanche Pulse Generators

A transistor driven into avalanche breakdown can produce a very fast-rise time pulse. Early UWB communications systems employed avalanche transistors for both the transmitter and receiver [1]. A complete description of the avalanche process is beyond the scope of this book. However, some understanding of the avalanche process is important. The process begins when the electric field across a reverse biased junction is great enough to pull electrons off the semiconductor atoms [2]. These electrons (and their corresponding holes) are accelerated through the semiconductor crystal and collide with other atoms, creating additional electron-hole pairs. These electron-hole pairs then produce additional collisions, producing a positive feedback where the number of charge carriers grows rapidly. The current through the junction quickly rises to a value limited only by external circuit restraints. Uncontrolled avalanche usually destroys the junction, but if the external current is limited an extremely fast-rise time step can be produced.

Generally, avalanche is to be avoided, so relatively little about it appears in textbooks. Information about avalanche for pulse generation can be found in [3]. Figure 5.1 shows the conditions for operating in the avalanche breakdown region. The safe operating active region (SOAR) defined by C-D-E in Figure 5.1 is the normal active region for bipolar junction transistors (BJT). BV_CEO is the collector-base breakdown voltage with the emitter open, and BV_CEX is the collector emitter breakdown voltage with the base reversed biased [2]. For avalanche breakdown, the device is biased somewhere between BV_CEO and BV_CEX with the base biased at zero volts or a small negative voltage. Figure 5.2 is a circuit that can be used to produce an avalanche pulse.

Figure 5.1. Plot of I_C Versus V_CE Defining the Avalanche and Normal Operating Region for a BJT.

Figure 5.2. Avalanche Pulse Generator Circuit.

In Figure 5.2, the base is driven positive with the trigger pulse and the device begins to conduct. The instant conduction begins, the device goes into avalanche breakdown. The collector emitter voltage follows the dynamic load line from point A to B as shown in Figure 5.1. The dynamic load line defined by C_O and R_L is entirely outside the SOAR, and V_CE rapidly collapses to point B because the entire load line is in the avalanche region. The DC load line that traverses the active region in Figure 5.1 is defined by R_C. As the device avalanches, the charge in C_O is quickly dumped through the device into R_L; the result is a fast-rising edge. The rise time is effectively limited by the inductance in the loop formed by the transistor, C_O, and R_L. It is possible to obtain subnanosecond rise time edges with microwave construction techniques.

As C_O is discharged, the collector operating point passes from point B in Figure 5.1 to point C. The device turns off and returns to point A to await retriggering; C_O is recharged through R_C. A major limitation on avalanche pulse generators is the rate at which the device can be retriggered. The values of C_O and R_C control the current through the device to limit its dissipation. The value for R_C must be large enough to prevent destruction of the device, but if R_C is larger it will take longer to recharge C_O.

Figures 5.3 and 5.4 show two variations on the avalanche circuit. In Figure 5.3, the load is in the emitter of the transistor and a positive going pulse is obtained. The circuit in Figure 5.4 replaces the C_O storage capacitor with a section of open circuited transmission line. When the transistor goes into avalanche breakdown, it effectively becomes a short circuit, and the energy stored in the transmission line begins to be discharged into the load. The discharge current propagates to end of the transmission line where the open circuit boundary condition causes an inverted reflection current to propagate down the line in the opposite direction. When this current reaches the collector, the sum of the reflection current and the discharge current is zero. The transistor collector current falls to zero, and the transistor returns to the nonconducting state. The result is a square pulse whose duration is twice the propagation time down the transmission line.

Figure 5.3. Positive Going Avalanche Pulse Generator.

Figure 5.4. Square Pulse Avalanche Pulse Generator.

SOURCE: H.-M. Rein, "Subnanosecond-Pulse Generator with Variable Pulsewidth Using Avalanche Transistors," IEEE Electronics Letters[4]. © IEEE, 1975. Used by permission.

Avalanche breakdown is difficult to characterize, and it is temperature- and process-dependent [2,3]. The same transistor part from different manufacturers may exhibit different avalanche characteristics. It is often necessary to select devices. The literature [1, 4, 5] shows that garden-variety silicon transistors, such as the 2N3904, 2N2222, and 2N918, seem to work well. The high voltages required for avalanche breakdown make battery operation difficult.

5.1.2. Step Recovery Diode Pulse Generators

Step Recovery Diodes (SRD) or "snap off" diodes can be used to make very fast-rise time pulses. SRDs were first commercially introduced by Hewlett Packard (now Agilent) for use as harmonic generators and as pulse generators in instruments that employed sampling. The Hewlett Packard Application Note 918 is an excellent introduction to pulse shaping and forming with the SRD [6].

Conventional diodes conduct when forward biased and shut off when reverse biased. SRDs have a P-I-N structure, and charge is stored in the intrinsic layer when the SRD is forward biased. This allows the SRD to continue to conduct when the device is reverse biased. This reverse conduction continues until the charge is swept out of the intrinsic layer; with the charge gone, the diode abruptly stops conducting and "snaps off". The SRD presents low impedance during the forward/reverse conduction and transitions to high impedance when it snaps off.

Figure 5.5 plots charge versus time when a current is applied. During the forward bias condition, minority carriers are injected into the junction. Due to the intrinsic layer, recombination requires a finite amount of time so charge is stored in the junction.

Figure 5.5. SRD Current and Stored Charge.

SOURCE: Application Note 918, Pulse and Waveform Generation with Step Recovery Diodes [6]. © Agilent Technologies Archives, 1984. Used by permission.

Let i_d be the instantaneous diode current, Q the charge stored, and t the carrier lifetime. We have the following

Equation 5.1

When a constant forward bias current is applied to the diode, charge is stored in the junction. The charge for a forward constant bias current is given by

Equation 5.2

where Q_f is the charge stored due to forward current and t_F is the time that forward current is applied. If the forward current is applied for a time significantly longer than the carrier lifetime, t, the stored charge can be approximated by

Equation 5.3

When the reverse current is applied, the stored charge is depleted. The depletion time is given by

Equation 5.4

where t_s is the time to remove the stored charge and I_R is the reverse current. Typical SRD circuits operate with 1, so (5.4) can be further simplified as

Equation 5.5

The value of t is specified by the diode manufacturer. Typical values of t range from 10-100 nanoseconds, so with the proper choice of I_F and I_R, it is possible to reduce the rise time of the transition applied to the SRD. Transition times range from 35-250 picoseconds. The practical limit on the minimum transition time is generally set by diode package parasitic capacitances. Figure 5.6 is a pulse sharpener circuit. V_b and R_b establish I_F in the diode. The positive going input pulse has the effect of reducing the amplitude of I_F. As the input voltage becomes more positive, the diode current i_d reverses and charge depletion begins. After the discharge period, t_s, the charge is totally depleted and the diode snaps off. During the time that the diode is conducting, it represents low impedance, and the voltage across it is low. When the diode snaps off, the voltage across the diode quickly rises as the diode transitions to a high impedance state. The diode acts as a charge controlled switch. The voltage waveforms are shown in Figure 5.7.

Figure 5.6. Pulse Sharpener Circuit Employing an SRD.

Figure 5.7. Voltage Waveforms in Pulse Sharpener Circuit.

SOURCE: Application Note 918, Pulse and Waveform Generation with Step Recovery Diodes [6]. © Agilent Technologies Archives, 1984. Used by permission.

SRD pulse sharpeners can be cascaded for even faster rise time. The literature reports a 70 picosecond rise time using an avalanche transistor driving two SRD pulse sharpeners [7]. Additional pulse sharpener circuits can be found in [6]. With the addition of transmission line circuits, it is possible to obtain impulse and monocycle outputs with SRDs. Figure 5.8 shows an SRD square pulse generator. When the SRD snaps off, a step is propagated in both directions away from the diode. The step arrives at the shorted end of the transmission line stub and is reflected back inverted. The first step arrives at the output, and the inverted step arrives after the round trip delay in the stub. The sum of the two steps produces a square pulse with a width that is approximately the round trip delay.

Figure 5.8. SRD Pulse Generator.

The addition of an R-C differentiator to the circuit in Figure 5.8 produces a monocycle output, as shown in Figure 5.9. A more sophisticated version of this circuit that suppresses the inevitable ringing that occurs as result of the impedance mismatch caused by the differentiator is available in the literature [8,9].

Figure 5.9. SRD Monocycle Generator.

SRDs can act as impulse generators as well as step generators [10,11]. A suitable circuit for an SRD impulse generator is shown in Figure 5.10. When the diode is forward biased, charge is stored in the diode. The forward conduction capacitance C_Fwd is assumed to be very large, and the diode essentially acts as a short circuit. During forward conduction, energy is stored in the inductor L. Just prior to the transition from C_Fwd to the reverse capacity C_VR, the energy stored in the inductor is given by . At the transition, energy is transferred from the inductor to C_VR. This creates an impulse of amplitude and width , as shown in Figure 5.11. It is assumed that the energy in the impulse is equal to the energy stored in the inductor just prior to the transition. This is the case if the loading from R_L is assumed to be light.

Equation 5.6

Figure 5.10. SRD Impulse Generator.

Figure 5.11. Output of SRD Impulse Generator.

and

Equation 5.7

The pulse width can be approximated by the resonant frequency of the circuit formed by L and C_VR. This is given by

Equation 5.8

Loading the circuit with R_L tends to decrease the amplitude of and increase the pulse width . The loaded amplitude and pulse width are given by

Equation 5.9

Equation 5.10

Zeta is the loading factor which is controlled by R_L and the other circuit parameters

Equation 5.11

For light loading, z << 1, the power in the impulse train can be calculated as

Equation 5.12

5.1.3. Tunnel Diode Pulsers

Tunnel diodes are PN junction devices that are capable of producing very fast transitions. A tunnel diode differs from a conventional diode in that the semiconductor doping is a factor of 1,000 or greater than that used in a conventional diode. Tunnel diodes are fabricated from germanium or gallium arsenide, and the resulting high conductivity semiconductor material produces a diode with a very thin junction (depletion region). Due to quantum effects it is possible for electrons to tunnel directly through the thin junction even when they do not have sufficient energy to surmount the junction potential barrier.

Under reverse bias, no majority charge carriers are injected into the junction, but the diode still conducts. This is due to the tunneling of valance electrons of the semiconductor atoms close to the junction. With a small forward bias, valence electrons continue to tunnel through the junction even though they do not have the requisite energy to overcome the junction potential. As the forward bias is increased, the energy of the free electrons in the N region becomes greater than valence electrons in the P region, and the tunneling current decreases. The free electrons still do not have enough energy to cross the junction, so the total current decreases. The result is a negative resistance region. As the forward bias is increased still further, normal diode conduction ensues. Figure 5.12 shows the I-V characteristic of a tunnel diode.

Figure 5.12. Tunnel Diode I-V Characteristic.

Tunnel diodes are typically specified in terms of the peak point, I_P and V_P, the valley point, I_V and V_V, and the slope of the negative resistance region, -g_d. An example is the 1N3716 (TD-3) with I_P = 4.7 mA, V_P = 55 mV, I_V = 1.04 mA, V_V = 350 mV, and g_d = 0.04 S. A bistable circuit that produces a fast-rise time step with a tunnel diode is shown in Figure 5.13. The diode is biased to point A just below V_P with a current through the diode. A small trigger voltage is applied across the diode. When the sum of the trigger and the bias voltage exceeds V_P, the current source forces the diode over into the unstable negative resistance region. The diode voltage rises until it reaches the stable point, B. The result is a very fast rise in the voltage across the diode. The diode may be reset by momentarily forcing the diode voltage below V_P or by interrupting the diode current. Because the tunnel diode produces a step, transmission line circuits similar to the ones used with the SRD can also employ tunnel diodes.

Figure 5.13. Tunnel Diode Bistable Operation.

A major limitation on tunnel diode pulsers is the size of the step. The step size is limited to approximately 250-500 mV. In addition, the bias point is temperature sensitive, so a stable trigger point can be difficult to maintain. The current applications for tunnel diode are limited to microwave detectors and pulse generator circuits. Because of the limited applications, tunnel diodes are expensive and can be difficult to obtain. The small step size limits the use of tunnel diodes in I-UWB transmitters, but the tunnel diode bistable circuit still has utility as a I-UWB receiver.

5.1.4. Pulse Circuits Suitable for Integrated Circuits

The UWB circuits shown thus far have limited utility in integrated configurations. It is highly desirable to design I-UWB transmitters that are compatible with CMOS and other IC technology. The following discusses several integrated pulse generator implementations.

Scholtz Monocycle Generator

An integrated implementation of the Scholtz monocycle generator was published in [12]. The circuit is shown in Figure 5.14. Q1-Q5 form a squaring circuit, and the L and the C perform a double differentiation on Q5's collector current.

Figure 5.14. Scholtz Monocycle Generator Using BJT's.

SOURCE: H. Kim, D. Park, and Y. Joo, "Design of CMOS Scholtz's Monocycle Pulse Generator," IEEE Conference on Ultra Wideband Systems and Technologies [12]. © IEEE, 2003. Used by permission.

The circuit squares the input current, and a Gaussian pulse can be approximated by squaring a tanh(t) input current. As the circuit squares the input current, a Gaussian pulse can be approximated by a sech²(t) function.

Equation 5.13

Equation 5.14

The input current is a tanh(t) function that can be obtained by the exponential function in the BJT. The collector current of Q5 in Figure 5.12 is the square of the input current

Equation 5.15

The collector current of Q5 is a Gaussian impulse. Due to the inductor in Q5's collector circuit, the collector voltage is proportional to the derivative of the collector current. The resulting collector voltage is a Gaussian monocycle. Due to the coupling capacitor, the voltage across the load is the derivative of the collector voltage. The output voltage is the second derivative of Q5's collector current. The resulting output is a Scholtz monocycle. Figure 5.15 is a graphic representation of the voltages and currents.

Figure 5.15. Input and Output Current and Output Voltage for the Monocycle Generator in Figure 5.14.

Emitter Coupled Logic

Emitter Coupled Logic (ECL) is another technology that can be integrated. The 10E/100E series ECL logic can drive coaxial transmission lines, and they have approximately an 800 mV output swing and a 400 picosecond rise time. Figure 5.16 depicts a typical ECL OR/NOR gate. ECL logic is built around a differential amplifier. ECL may be fast, but its power consumption is high because all the devices are biased into the active region. Figure 5.17 is an input output voltage characteristic of a 10E series ECL. The voltage swing is approximately one volt, and ECL can drive 50 ohm loads.

Figure 5.16. ECL Gate.

Figure 5.17. 10E Series ECL Input/Output Voltage Characteristic.

Differential Circuits, The H Bridge

ECL gates are built around differential amplifiers. Differential drive is the basis for an additional I-UWB transmitter that is suitable for integration. Figure 5.18 shows an H bridge circuit. The antenna forms the cross bar in the H, and a set of complementary switches forms the vertical bars of the H. As point A is driven low, point B is simultaneously driven high. The result is that point D goes low at the same time C is driven high. The effect is to double the slew rate. It is possible to drive A high while driving B low to generate a pulse of the opposite polarity.

Figure 5.18. H Bridge Transmitter Output Stage.

The disadvantage of the H bridge is that neither side of the load (the antenna in Figure 5.18) can be grounded. However, this is not a problem for current loop antennas of the type used by Harmuth [13, 14]. Harmuth uses a BJT H bridge to drive his current loop antennas. The gate and H bridge circuits lend themselves to pulse shaping. The pulse length and timing can be controlled by the input signal.

A loop antenna and an H bridge circuit is employed in the transmitter of Aether Wire's location device [15]. With a loop antenna, the radiated energy is a function of the derivative of the current running through it. Gaussian impulses are radiated with an exponential rise or fall of current. This system lends itself to the transmission of doublets as shown in Figure 5.19. Strings of consecutive impulses of the same polarity will require ever increasing or decreasing antenna current. The doublets have zeros in their spectrum at DC and multiples of 1/t_o.

Figure 5.19. Gaussian Doublet Generated by H Bridge Transmitter.

The Aether Wire location device employs doublet-encoded sequences. Each doublet is a "chip" in conventional spread spectrum terminology. The radiated spectrum can be controlled by the doublet timing and the time between the doublets. An example of the transmitted pulses is shown in Figure 5.20. A "1" or a "0" can be transmitted by changing the polarity of the pulses.

Figure 5.20. Gaussian Doublet and Code Used by Aether Wire Location Devices.

Aether Wire employs a type of sliding correlator called a time integrating correlator [16] in the receiver. The polarity of the correlator in the receiver is controlled by the code. If the receiver code matches the transmitter code, the output of the correlator continues to grow as shown in Figure 5.20.

Programmable CMOS Pulse Generator

A CMOS pulse generator circuit is proposed by Marsden, Lee, Ha, and Lee in [17]. Figure 5.21 shows a pulse generator circuit that is capable of synthesizing different waveforms by controlling the timing and sequence of transistor switching. Consider an example where devices A and D are switched off, and devices B and C are switched on (see Figure 5.21). This is the quiescent state, so no current flows through the load; however, DC current flows through the drain load inductor. Device B is now biased off. The current through the inductor cannot change instantaneously, so current flows into the coupling capacitor through the load, causing the load voltage to rise. At some later time, devices A and D are turned on. The current through A, B, and D now exceeds the current through L, so C discharges and the voltage across R_L goes negative. Device C is now turned off, and the coupling capacitor, C, charges back to the quiescent condition. The resulting output is an approximation of a Gaussian monocycle. Figure 5.22 shows the timing. A range of pulses can be generated with this circuit. Figure 5.23 shows the state diagram and the resulting output pulse. The example described previously begins at the 0110 (A on, B and C off, D on) state and transitions with B off, then A and D on, and then C off (B, AD, C) to the 1001 state on the right. Similar transition sequences can produce an opposite polarity monocycle or positive and negative going impulses.

Figure 5.21. CMOS Switch Pulse Generator.

SOURCE: K. Marsden, H. -J. Lee, D. S. Ha, and H. -S. Lee, "Low Power CMOS Reprogrammable Pulse Generator for UWB Systems," IEEE Conference on Ultra Wideband Systems and Technologies [17]. © IEEE, 2003. Used by permission.

Figure 5.22. Pulse Generator Timing and Output Voltage.

SOURCE: K. Marsden, H. -J. Lee, D. S. Ha, and H. -S. Lee, "Low Power CMOS Reprogrammable Pulse Generator for UWB Systems," IEEE Conference on Ultra Wideband Systems and Technologies [17]. © IEEE, 2003. Used by permission.

Figure 5.23. Pulse Generator Transition States.