4.1. The Motivation Behind Impulse C
The goal of Impulse C is to allow the C language to be used to describe one or more units of processing (called processes) and connect these units to form a complete parallel application that may reside entirely in hardware, as low-level logic mapped to an FPGA, or that can be spread across hardware and software resources, including embedded microprocessors and DSPs. This multiprocess, parallel approach is highly appropriate for FPGA-based embedded systems, as well as for larger platforms that consist of many (perhaps hundreds) of FPGAs interconnected with traditional processors to create a high-performance computing platform.
The Impulse C approach focuses on the mapping of algorithms to mixed FPGA/processor systems, with the goal of creating hardware implementations of processes that optionally communicate (via streams, signals and memories) with software processes either residing on an embedded microprocessor and/or implemented as software test bench functions in a desktop simulation environment.
Support for streams, signals, and memories is provided in Impulse C via C-compatible intrinsic functions and related stream, signal, and memory datatypes. For processes mapped to hardware, the C language is constrained to a subset of C, while software processes are constrained only by the limitations of the host or target C compiler.
The Impulse C programming model is that of communicating processes, as presented in the previous chapter. The Impulse C compiler generates synthesizable HDL for hardware processes as well as generating the required hardware-to-hardware and hardware-to-software interfaces implementing the specified streams, signals, and memories. The compiler can perform instruction scheduling, loop pipelining, and unrolling. It includes various pragmas (expressed using the #pragma statement in C) allowing optimization results to be tailored to meet general size/performance requirements.
The Impulse C software library supports desktop emulation/simulation of the parallel behavior of Impulse C applications when compiled using standard C development tools such as gcc and Visual Studio. The Impulse C libraries also support execution of Impulse C software processes on one or more embedded processors, providing a programming model in which system-level parallelism (expressed using multiple processes running on embedded processors and in FPGA hardware) may be expressed.
Impulse C platform support libraries are available for specific FPGA-based targets such as the Xilinx MicroBlaze and PowerPC-based FPGAs, as well as Altera FPGAs featuring the Nios and Nios II soft processors. Impulse C can also be used to generate hardware modules that do not interface to software processes, meaning it is not necessary to include an embedded processor to make use of Impulse C.
As you'll see in a later chapter, the ability to create mixed hardware/software applications in a common language is also helpful for creating in-system, software-driven test benches for hardware modules. In this use model, specific hardware modules, whether originally described in C or hand-crafted using HDLs, are tested using software and/or hardware test modules written in C and compiled to the embedded processor, to available FPGA resources, or to both, creating a mixed hardware/software test system.