Central Processing Unit

Embedded systems are designed around either a microcontroller or a microprocessor. For our purposes, this distinction isnt really significant, partly because the line drawn between the two is getting a bit blurred with current development. A few years ago, microprocessors were defined as execution units and everything else was an external peripheral device. A microcontroller, on the other hand, was distinguished by the fact that it had everything it needed on one chip. This distinction isnt as clear today. Chips we once called microprocessors are becoming more and more integrated with added peripherals. These chips include things like serial ports, programmable chip selects, interrupt controllers, DRAM controllers, internal timers, and programmable I/O pins. Some chips go even further with a built-in Ethernet device and PCI controller in the same chip. Some chip vendors refer to these chips as microcontrollers, and others refer to them as microprocessors. (Some say pot ae to and some say pot ah to Either way, it still makes french fries !) Dont let the names confuse you. In this text, I stick to the following usage:

  • Microcontroller those devices that can be configured to run 100 percent on their own. With a microcontroller, there is no need for any other peripheral devices (except maybe a power supply and crystal). Microcontrollers contain some small amount of nonvolatile memory for program storage and volatile memory for program use and typically come with an 8- or 16- bit internal CPU. Devices that fall into this category include the 8051 and 68HCXX families.

  • Desktop Microprocessor those devices that contain almost nothing except the processing engine. They immediately require complex support chips as their peripherals. The low end of these devices are 32-bit chips, but 64- and 128- bit processors are getting more and more common. This category includes devices like the K6, Pentium, and G4 processors.

  • Embedded Microprocessor those devices that contain a processing unit and some set of peripherals typically seen in an embedded system. These devices generally fall in the 16- and 32- bit category and include processors like the 68332, PPC860, and SH2.

  • CPU (Central Processing Unit) this term can refer to any of the above, or it can refer to just the processing section of a microcontroller or embedded microprocessor.

Keep in mind that these definitions are not the rule in the industry. You should also note that there is some overlap between the different terms. Both microcontrollers and desktop microprocessors are used in embedded systems. In fact, back in the 1980s, microcontrollers were even used in some of the first desktop machines.

Microcontrollers, as defined above, dominate the embedded systems market by several orders of magnitude. However, silicon (both processor and memory) prices are dropping, and the larger 16- and 32-bit processors are gaining ground in embedded applications. This book generally focuses on systems based on embedded microprocessors.

Embedded microprocessors come in a variety of shapes and sizes. They are even becoming available as logic cores designed for integration into very large programmable devices called field programmable gate arrays (FPGA). Companies that were producing programmable logic at one time are now producing programmable logic with a built-in processor.

Following is a brief description of some of the typical peripherals that are included with todays embedded microprocessors. I discuss each item using the analogy of a similar process in an office environment.

Programmable Chip Selects

Like a committee chairperson, programmable chip selects reduce confusion by coordinating communication. Imagine you are in a meeting and you are trying to speak to one person in the group . In this situation, you need some way to let that person know that you want to talk to them. Ideally, this mechanism should also let all the other people know that you are not addressing them. Chip selects perform this task for the microprocessor. Devices that are peripheral to the processor occupy some amount of space within the processors address range. When a peripheral devices chip enable input line is not active, its data bus is in a high-impedance state, or disconnected, condition. This idea is very important because electrically there can only be one device actually writing data onto the data bus at any one time. (The term bus contention refers to the illegal condition that occurs if more than one device is attempting to write on the data bus at a given time.)

The firmware must know the address range for each peripheral device, which is typically decided at the hardware design stage. Each peripheral has some set of characteristics with which the processor must deal so that the two can interact with each other. Some peripherals use a very small amount of address space while others can use several kilobytes. Some peripherals are fast enough to keep up with the processor, and others force the processor to wait. In some cases, the peripheral tells the processor asynchronously when the peripheral has done its task, and, in other cases, a defined number of clock cycles must elapse between accesses to the peripheral device. All of these pesky little details can add up to a significant amount of extra glue logic between the processor silicon and the peripheral silicon. To reduce the need for glue logic, most processors intended for the embedded market offer pins called programmable chip selects . The chip select is a pin that the CPU uses to access a unique address range on the processor bus. There are typically three to six of these lines on an embedded processor, and the hardware attached to these lines can provide a simple one-device-per-chip select. Alternatively, there may be additional logic between the CPU and peripheral that performs additional address decoding to allow multiple devices to connect to a single chip select.

Note 

Glue logic refers to the extra circuitry (logic) that would be necessary to connect (or glue) two devices together.

Interrupt Controller

An interrupt controller helps prioritize incoming messages, which is a task that any office worker can appreciate. Consider the following small office scenario. Person_A is in an office behind a desk, talking on the phone. Person_B walks down the hall directly into Person_As office and asks a question. Person_A can do one of several things:

  • Totally ignore Person_B and continue the phone conversation.

  • Quickly acknowledge Person_Bs request but respond with something like OK, Ill get to that in a little while, placing the request into a pile with a bunch of others.

  • Tell the person on the phone that the conversation will have to continue later and then respond to Person_B. This outcome is likely if Person_A considers Person_B to be more important than whomever is on the phone.

  • End the conversation. This outcome occurs automatically, regardless of whom is on the phone, if Person_B is the boss.

You can say that Person_A processes the interrupt from Person_B. Several factors determine whether or not Person_B is acknowledged , including the importance of the person on the phone, the fact that Person_As door might have been closed, and so on. Somehow Person_A must prioritize the interrupt based on what is currently going on.

Now, consider Person_A having the phone conversation to be the CPU currently executing instructions and Person_B to be a peripheral device that needs the CPUs attention. An integrated interrupt controller provides the CPU with this ability to enable, disable, and prioritize incoming interrupts from both internal and external peripherals. Usually all incoming interrupts are maskable (can be disabled) except the NMI (non-maskable interrupt) and reset lines (the bosses).

Timer-Counter Unit

Consider a scenario with several typists working in an office. For a little fun, they decide to see who can type the most words in one minute. They gather around a computer terminal, and each one gets a shot at the one-minute trial. However, they find that they need some way to keep track of the 60-second interval of time from the beginning to the end of the test. Alternatively, they might just count the number of seconds taken to type a specific block of text. In this case, they are not measuring a fixed amount of time but the elapsed time it takes each individual to complete the challenge.

The timer-counter unit within an embedded system can help with this process. The unit provides the CPU with capability related to elapsed time. The timer-counter unit provides the firmware with the ability to generate periodic events, including events based on incoming pulse counts.

Note 

It is important to note that the microprocessors timer-counter unit usually does not deal with time of day on its own, so dont assume that timer means wall clock. In most cases, timer means stop watch. A stop watch can be converted to a wall clock if at some starting point the stop watch is synchronized with a wall clock. This process is what is done with the microprocessors timer if time-of-day is needed.

DMA Controller

Consider an office that contains a file cabinet. In that file cabinet is paperwork that several office workers need to access. Some only need to access it once in a while, while others require the paperwork much more often. The manager of the office sets up a policy so that some of the individuals have a personal key to get into the file cabinet, while others must get a shared key from the manager. In other words, some office workers have direct access to the file cabinet, and others have indirect access.

In many embedded system designs, the CPU is the only device that is connected to the memory. This means that all transactions that deal with memory must use the CPU to get the data portion of that transaction stored in memory, just as some office workers had to obtain the managers key. Direct memory access (DMA) is a feature that allows peripherals to access memory directly without CPU intervention. These peripherals correspond to the office workers with their own keys.

For example, without DMA, an incoming character on a serial port would generate an interrupt to the CPU, and the firmware would branch to the interrupt handler, retrieve the character from the peripheral device, and then place the character in a memory location. With DMA, the serial port places the incoming character in memory directly. When a certain programmed threshold is reached, the DMA controller (not the serial port) interrupts the CPU and forces it to act on the data in memory. DMA is a much more efficient process. Many integrated microprocessors have multiple DMA channels that they can use to perform I/O-to-memory, memory-to-I/O, or memory-to-memory transfers.

Serial Port

Consider the front door of an office building. The front door is where people can come in and out and easily interact with the facilities provided by the business. This fact doesnt mean that there arent other ways to contact the business, but the front door is a very convenient and standard way of doing it.

This task of providing access is the serial ports job. The serial port provides basic communication to a console or some other device that understands the same protocol. The serial port or universal asynchronous receiver transmitter (UART) provides the CPU with an RS-232 bit stream, which is the same technology used for the PCs COM port. Different processors have different variations on this standard, but, in almost all cases, the minimum is a basic asynchronous serial bit stream (using RS-232 levels) consisting of one start bit, some number of data bits (usually between five and nine), and one or two stop bits.

DRAM Control Unit

Imagine that you are a manager with some employees who have many useful talents but also need the time to take care of their children. You could just tell them you cant deal with the kids in the office (and lose their talents), or you could be a bit more flexible and offer to have some other employees in the office take care of their kids.

This is the dynamic RAM (DRAM) story. RAM is very useful in all microprocessor-based projects. DRAM is a much cheaper alternative to SRAM, but, unlike SRAM and flash memory, DRAM requires baby-sitting or extra logic in the hardware to keep the bits in the DRAM stable. The type and size of the DRAM determine how complex the baby-sitting needs to be. The DRAM control unit does the the babysitting so that the CPU can interact directly with the dynamic RAM.

Memory Management Unit

A memory mangement units (MMU) main responsibility is to define and enforce the boundaries that separate different tasks or processes. To understand the effect of separating tasks , consider two different office environments. In the first one (the formal environment), there is an individual office for each employee. Each employee has a key to the door of his or her office and is considered the owner of that space. The second environment (the informal environment) uses a bullpen setup. There are no walls between employees, and everyone is on the same floor in the same air space. Each one of these configurations has its particular advantages and disadvantages. In the formal environment, you dont have to worry about one employee bothering another employee because there are walls between them. No matter how noisy one employee gets, the neighboring worker does not hear the disturbance. This is not the case for an informal setup. If an employee is talking loudly on the phone in the open environment, this inconsiderate individual distracts the other workers. If, on the other hand, the employees are considerate, two employees can quickly communicate with each other without needing to leave their seats. Similarly, if one employee needs to borrow another employees stapler, its just a toss away. In the formal environment, each time communication needs to take place, the communicating employee needs to go through some series of steps, like making a phone call or walking to the other office.

Each employee can be compared to a block of code (or task) that is designed to perform some specified job in an embedded systems program. The air space equates to the memory space of the target system, and the noise generated by a misbehaving employee can be equated to a bug that corrupts the memory space used by some other task. The MMU in hardware, if configured properly, can be compared to the walls of the formal office environment. Each task is bounded by the limitations placed on it by the MMU, which means that a task that somehow has a bad pointer cannot corrupt the memory space of any other task. However, it also means that when one process wants to talk to another process, more overhead is required.

Later, in this book, you will see that code bounded by the MMU protection is called a process and code not bounded by an MMU is called a task. A few years ago, the full use of an MMU in an embedded system was rare. Even today, most embedded systems dont fully use the capabilities of the MMU; however, as embedded systems become more and more complex and CPU speeds continue to rise, the use of an MMU to provide walls between processes is becoming more common.

Cache

Lets say you work at a desk and you regularly access folders from a file cabinet near your desk. Some folders you access regularly, others you access less frequently. You could return each folder to the file cabinet after each access. On the other hand, you might decide to use some smaller shelf right on your desk for those folders that you access frequently so that you dont have to get up to get them as often. On any given day, the set of folders that are in the shelf on your desk may change based on how much you plan to access them on that day. When properly organized, the local shelf can save you several trips to your file cabinet.

The microprocessor and memory story is similar. Microprocessors have been speeding up at a much faster pace than have the large memory subsystems with which they interact. To compensate for this difference, smaller blocks of really fast (and more expensive) memory are put between the microprocessor and system memory so that fetches to memory that happen frequently can be done through this faster cache memory instead of through the slower standard memory.

Programmable I/O Pins

As the manager of an office, you know that the ideal hiring scenario is to hire individuals that have multiple skill sets. Though each employee can only do one thing at any one time, hiring multi-talented individuals gives you the option of using the same group of people in several different ways.

The pin set of most modern processors also gives you this option. All of the previously mentioned peripherals require the use of a certain set of pins on the processor. In many cases, the majority of those pins can be used for their specific function (serial port receiver, timer output, DMA control signal, etc.), or they can be programmed to just act as a simple input or output pin (PIO). This flexibility allows the silicon to be configured based on the needs of the design. For example, if you dont need two serial ports (and the processor comes with two), then the pins that are allocated to the second port (RX2, TX2, and maybe DTR2, CTS2, etc) can be programmed to function as simple PIO pins and used to drive an LED or read a switch.

Note 

Programmable pins are sometimes referred to as dual function. Note that this dual functionality should not be assumed. How each pin is configured and the ability to configure it to run in different modes is dependent on the processor implementation. Often a pin name is chosen to reflect the pins dual personality. For example if RX2 can be configured as a serial port 2 receiver or as a PIO pin, then it will probably be labeled as RX2/PION (or something similar), where N is some number between one and M , and M is the number of PIO pins on the processor. You should be aware that some microprocessors may be advertised as having a set of features but actually provide these features on dual-function pins. Hence, the full set of advertised features (two serial ports and 32 PIO lines) may not be simultaneously available (because the pins used for the second serial port are dual-functioned as PIO lines). Make sure you read the datasheet carefully !

Putting It All Together

The essential point of all these office analogies is that different offices can be configured in quite a variety of different ways depending on the needs of the business that the office supports. The same thing applies to embedded microprocessors.

The discussion so far has assumed that these components exist on the chip with the CPU, but they can also appear as physically separate components . The next sections discuss components that are usually found outside the microprocessor.



Embedded Systems Firmware Demystified
Embedded Systems Firmware Demystified (With CD-ROM)
ISBN: 1578200997
EAN: 2147483647
Year: 2002
Pages: 118
Authors: Ed Sutter

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