Section 8.5. Virtual-to-Physical Translation

8.5. Virtual-to-Physical Translation

Rather than managing every byte of memory, we use page-size pieces of memory to minimize the amount of work the virtual memory system has to do to maintain virtual-to-physical memory mappings. Figure 8.1 shows how the management and translation of the virtual view of memory (the address space) to physical memory is performed by hardware known as the virtual memory management unit (MMU).

Figure 8.1. Solaris Virtual-to-Physical Memory Management

The Solaris kernel breaks up the linear virtual address space into mappings, one for each type of memory area in the address space. For example, a simple process has a memory mapping for the process binary and one for the scratch memory (known as heap space). Each mapping manages the spanned virtual address range and converts that mapping into MMU pages. The hardware MMU maps those pages into physical memory by using a platform-specific set of translation tables. Each entry in the table has the physical address of the page of memory in RAM so that memory accesses can be converted on-the-fly in hardware. We cover more on how the MMU works later in this Part when we discuss the platform-specific implementations of memory management.