Section 6.9. Summary

6.9. Summary

In this chapter we have explored how FPGA hardware, in the form of hardware description language files, is created by the Impulse C compiler. We have also seen how these hardware processes may be connected to external hardware components, using a VHDL test bench for demonstration purposes. And lastly, we have explored some of the language-level optimizer controls available to you as an Impulse C program and have shown (briefly) how cycle-accurate debugging can be accomplished using a hardware simulator.

The chapters that follow spend more time exploring important topics related to hardware generation and optimization, using a series of examples as the basis for discussion. First, however, it is important for us to examine in more detail the statement-level optimizations available to you and to describe how certain programming techniques can help increase application performance.

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The structure of hardware descriptions created by the Impulse C compiler depends on many factors, including the coding style used (in particular, how stream reads and writes are specified), the target platform, and the version of the hardware generator and/or optimizer. Changes are being made to the software at a rapid pace. For a more complete understanding of the generated hardware structure, you may want to visit the Impulse C online discussion forums at

    Practical FPGA Programming in C
    Practical FPGA Programming in C
    ISBN: 0131543180
    EAN: 2147483647
    Year: 2005
    Pages: 208

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