| During system initialization, low level BIOS or other system software uses configuration transaction cycles to "walk" each PCI-compatible bus (PCI, PCI-X, HyperTransport, AGP, etc.) and read the PCI configuration space of each device function it finds. Once discovered , basic and advanced capability features of each device are set up as appropriate. Collectively, PCI configuration cycles may be used for many aspects of device management, including: -
Assignment of system resources. Unlike earlier bus protocols, including the Industry Standard Architecture (ISA), PCI compatible plug-and-play devices are not allowed to establish their own base addresses and interrupt levels using fixed schemes or through user manipulation of jumpers and switches. Instead, the designer of a PCI compatible device "hard codes" information in selected PCI Configuration Space fields describing the fixed requirements of the device with respect to memory and I/O addresses needed, whether system interrupt support is required, arbitration needs, etc. Once the system address maps and interrupt routing are determined, software then returns to programmable fields in the PCI Configuration Space of each device and programs address ranges, interrupt routing, etc. -
Enabling of device capabilities and options. In addition to assignment of system resources to PCI compatible devices, software also uses the PCI Configuration Space to select device options, enable bus mastering and target decoding of memory and I/O transactions, program error response strategy, and set up other basic PCI and advanced capability protocol features. -
Checking of dynamic (error) status. Finally, the PCI configuration space is used to log errors resulting from attempted transactions. These logged errors, if checked by software, provide a picture of the nature of the error, which device(s) detected it, etc. The Status register in the configuration space header is used for generic PCI-type error logging; in addition, advanced capability register blocks also contain logging fields for errors related to a specific capability (e.g. HyperTransport CRC errors, buffer overflow errors, etc.).  |
