The performance data you can gather for hardware in routers and switches is minimal. But one aspect of hardware that indirectly affects performance is effective backplane utilization versus backplane oversubscription. This is true, especially on the core high-end routers and switches, such as the 7513 router or 5500 switch, respectively. Physical card positioning in these devices is crucial for achieving optimal performance in the network. Because these devices are typically placed in the core portion of the network, it is important to understand the interdependencies between the card positioning and the backplane bus architecture of the device. By understanding the architecture and physical layout of the devices, you also can manage assets more effectively. We'll first look briefly, as an example, at the 7513 series router backplane bus architecture and the dependencies with the interface processors (IPs) and their respective slot positions. Based on these dependencies, you can reference the appropriate MIBs and show commands, as defined in sections of this chapter, to draw a correlation between the slot position or card type and the relative bus speeds on the backplane of the chassis. We'll then consider some of the specifics of the hardware characteristics, such as hardware buffer carving and IDBs (Interface Descriptor Blocks). Understanding how these specific details apply to the different type of interface cards will assist you in determining the appropriate kind of hardware to place in the appropriate location in the chassis. Backplane Bus Architecture in the 7x00 Series RoutersThe 7513 and 7507 have two buses of 1.066 Gbps each, one on either side of the RSPs (Route Switch Processors). On the 7513:
On the 7507:
The 7505, of course, has only one 1.066 Gbps bus. When loading IPs in the 7500 series routers, follow these guidelines:
IDBs (Interface Descriptor Blocks)When deciding what kind of cards (IPs) and how many cards to put in a router, one more characteristic needs to be taken into consideration, namely IDBs, or Interface Descriptor Blocks. Each of the following interface types requires an IDB:
Table 10-1 lists the maximum limits for the IDBs across the different IOS releases as they apply to the 7500 series routers. Other router platforms may exhibit different limits, but generally are in the 300-range limit. Please note that the 7000 series router keeps 40 IDBs to itself.
Hardware BuffersIn addition to IDBs, hardware allocation is a factor in determining what gets configured on the router. Hardware buffers are divided up at boot time. Based on the amount of like interface media and common MTU sizes, the appropriate hardware buffer sizes and quantities are alloted to unique buffer pools. These buffer pools are taken from MEMD or packet memory. Packet memory resides on the RSP and is typically 2 MB in size. The older RSPs and RP/SP combination in the 7000 series have 512 KB of MEMD. This "buffer carving" takes place only on the high-end routers. Low-end routers (4x00, 3600, 2500 series) use I/O memory or shared memory for their hardware buffer allocation for the interfaces. The more interfaces you have in a router, the smaller your hardware buffer pool will be for each interface. When there is a shortage of hardware buffers, "ignores" are typically incremented on the interface because there is no place to put the incoming packet. MEMD Buffer Carving DetailsMEMD buffer carving is the portion of CBUS initialization in which MEMD buffers or packet buffers are allocated, based upon media interface bandwidths and MTUs. Buffers of a given size share a common free pool to be shared by all interfaces with closely matched MTUs. The buffer-carving algorithm is based on fair share, but it has some built-in low water marks and configurable high-water marks. The algorithm works like this:
MEMD QuantitiesTwo important quantities mentioned in the preceding discussion of buffer carving are maximum buffers and receive queue limit (RQL). Another important quantity is transmit queue limit (TQL). Following are brief explanations of each of these quantities:
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