24.

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Chapter Review

In this chapter, we have focused on alternative strategies for implementing finite state machines. We covered structured logic methods, based on ROM, PLA, and PALs, to compute the next-state and output functions. We also examined MSI-based implementation strategies, using components like counters, multiplexers, and decoders to implement the machine using a small number of component packages.

If the goal is minimum package count, the best solution is to use some of the more advanced programmable logic components, such as those provided by Altera, Actel, and Xilinx. Altera's architecture is a generalization of the more conventional PAL structures. Their major innovations are the ability to share product terms among multiple output functions and a more general method of interconnect.

Actel bases its architecture on a very simple building block, a gen-eralization of the four-to-one multiplexer, and a flexible orthogonal wiring grid for interconnections. Whereas Altera and Xilinx parts can be reprogrammed, the Actel technology is program-once. Therefore, you must take care to fully simulate the design before the programming process. There are no second chances!

We concentrated on Xilinx technology, because it was the first in the programmable gate array business and, thus, is the most prevalent in industry today. The architecture is based on complex building blocks, the IOB and CLB, containing considerable logic, flip-flops, and interconnection resources. These blocks are interconnected by a network of vertical and horizontal tracks joined by switching matrices.

In the final section of the chapter, we looked at the detailed implementation of the traffic light controller, a running example throughout this book. In particular, we examined PAL/PLA/ROM implementations, counter/multiplexer/decoder implementations, and how they might be implemented within a Xilinx LCA. Interestingly, the MSI-inspired implementation yielded a much more elegant solution than the one obtained from discrete gates. Many MSI building blocks, or suitably modified versions of them, can map nicely onto the primitives provided by the LCA.

Further Reading

The best place to learn about special PAL/PLD architectures is in the data books available from the manufacturers. These are usually filled with excellent tutorial materials and detailed design examples in the applications notes. Here is a partial list of relevant databooks:
Actel, ACT1 Family Gate Arrays (June 1988).
Altera, Applications Handbook (July 1988).
Altera, Data Book (October 1990).
Cypress Semiconductor, CMOS/BiCMOS Data Book (February 1989).
Monolithic Memories, Programmable Logic Handbook, 4th ed. (1985).
Xilinx, Programmable Gate Array Design Handbook, 2nd ed. (1989).
Some books have recently been published that focus exclusively on digital design techniques for programmable logic. R. Sandige's book, Modern Logic Design, McGraw-Hill, 1990, focuses on PROM/PAL/PLA-based design. P. K. Lala, PLD: Digital System Design Using Programmable Logic Devices, Prentice-Hall, 1990, gives a very detailed description of the various PAL and PLD families and many excellent design examples. He includes discussions of the more modern components from Actel, Altera, and Xilinx. M. Boulton, Digital Systems Design with Programmable Logic, Addison-Wesley, 1990, covers similar ground.

The Actel databook mentioned above includes several technical paper reprints that describe the underlying technology in significant detail. Among these are K. A. El-Ayat et al., "A CMOS Electrically Config-urable Gate Array," originally published in the IEEE Journal of Solid State Circuits, 24 (3), 752-762 (June 1989), and A. El Gamal et al., "An Architecture for Electrically Configurable Gate Arrays," IEEE Journal of Solid State Circuits, 24 (2), 394-398 (April 1989).
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This file last updated on 07/15/96 at 21:30:30.
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What is Sarbanes-Oxley[q]
What is Sarbanes-Oxley[q]
ISBN: 71437967
EAN: N/A
Year: 2006
Pages: 101

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