1.1. A Quick Introduction to FPGAs
A field-programmable gate array (FPGA) is a large-scale integrated circuit that can be programmed after it is manufactured rather than being limited to a predetermined, unchangeable hardware function. The term "field-programmable" refers to the ability to change the operation of the device "in the field," while "gate array" is a somewhat dated reference to the basic internal architecture that makes this after-the-fact reprogramming possible.
FPGAs come in a wide variety of sizes and with many different combinations of internal and external features. What they have in common is that they are composed of relatively small blocks of programmable logic. These blocks, each of which typically contains a few registers and a few dozen low-level, configurable logic elements, are arranged in a grid and tied together using programmable interconnections. In a typical FPGA, the logic blocks that make up the bulk of the device are based on lookup tables (of perhaps four or five binary inputs) combined with one or two single-bit registers and additional logic elements such as clock enables and multiplexers. These basic structures may be replicated many thousands of times to create a large programmable hardware fabric.
In more complex FPGAs these general-purpose logic blocks are combined with higher-level arithmetic and control structures, such as multipliers and counters, in support of common types of applications such as signal processing. In addition, specialized logic blocks are found at the periphery of the devices that provide programmable input and output capabilities.
Common FPGA Characteristics
FPGAs are mainly characterized by their logic size (measured either by the number of transistors or, more commonly, by the number of fundamental logic blocks that they contain), by their logic structure and processing features, and by their speed and power consumption. While they range in size from a few thousand to many millions of logic gate equivalents, all FPGAs share the same basic characteristics:
FPGA Programming Technologies
FPGA programming technologies range from one-time-programmable elements (such as those found in devices from Actel and Quicklogic) to electrically erasable or SRAM-based devices such as those available from Altera, Lattice Semiconductor, and Xilinx.
While most FPGAs in use today are programmed during system manufacturing to perform one specific task, it is becoming increasingly common for FPGAs to be reprogrammed while the product is in the field. For SRAM-based and electrically erasable FPGAs this field upgrading may be as simple as providing an updated Flash memory card or obtaining a new binary device image from a website or CD-ROM.
Hardware applications implemented in FPGAs are generally slower and consume more power than the same applications implemented in custom ASICs. Nonetheless, the dramatically lowered risk and cost of development for FPGAs have made them excellent alternatives to custom ICs. The reduced development times associated with FPGAs often make them compelling platforms for ASIC prototyping as well.
Many modern FPGAs have the ability to be reprogrammed in-system, in whole or in part. This has led some researchers to create dynamically reconfigurable computing applications within one or more FPGAs in order to create extremely high-performance computing systems. The technology of reconfigurable computing is still in its infancy, however, due in large part to the high cost, in terms of power and configuration time, of dynamically reprogramming an FPGA. We will examine some of this research and make predictions regarding the future of reconfigurable computing in a later chapter.
Defining the behavior of an FPGA (the hardware that it contains) has traditionally been done either using a hardware description language (HDL) such as VHDL or Verilog or by arranging blocks of pre-existing functions, whether gate-level logic elements or higher-level macros, using a schematic- or block diagram-oriented design tool. More recently, design tools such as those described in this book that support variants of the C, C++, and Java languages have appeared. In any event, the result of the design entry process (and of design compilation and synthesis, as appropriate) is an intermediate file, called a netlist, that can be mapped to the actual FPGA architecture using proprietary FPGA place-and-route tools. After placement and mapping the resulting binary filethe bitmapis downloaded to the FPGA, making it ready for use.