Appendix B. Creating a Custom Stream Interface
This appendix is based on an application note and related VHDL source code titled "An Impulse C Compatible Stream Interface for the National DS92LV16 Serializer/Deserializer," developed by Scott Bekker and Dr. Ross Snider of the Signal Processing and Neural Instrumentation Laboratory at Montana State University in Bozeman, Montana.
While most of this book has focused on applications that communicate with other parts of a hardware/software system via predefined stream, signal, and memory interfaces, for many real-world applications it is necessary for performance reasons to create direct connections between hardware processes written in C and other hardware elements such as high-speed I/O devices. The creation of such interfaces requires a good grasp of FPGA hardware design fundamentals, but for those with the right expertise it is not a difficult problem, given the standarized nature of the stream and signal interfaces.
This chapter describes one such application, presenting the VHDL code written to implement an Impulse C-compatible stream over a standard serial device, the National DS92LV16 serializer/deserializer (SERDES). The VHDL code (which appears at the end of this chapter, in Figure B-5) describes a handshaking protocol that establishes a stream connection and provides a fault-tolerent means of data transfer. Once the connection is established, data can be transferred in either direction with the standard Impulse C stream interface.