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3.5 Practical Matters

We now turn from the theory of digital circuits to some more practical engineering aspects. In this section, we will first learn how to read a component data sheet. Then we will see how to perform some simple electrical calculations on the data it presents. We will be using the data sheet for the 74LS00 quad two-input NAND gate component as a running example. Finally, we will see how to connect inputs and outputs to our circuits by using simple switches and light-emitting diodes.

3.5.1 Elements of the Data Sheet

A data sheet contains all the relevant documentation that you need to use the component. The basic elements include (1) an English-language description of the function performed by the component, (2) a function/truth table, (3) a logic schematic with labeled inputs and outputs, (4) Boolean expressions defining the outputs in terms of logic functions of the inputs, (5) alternative package pin-outs, (6) internal transistor schematics, (7) operating specifications for the component, (8) recommended operating conditions, (9) electrical characteristics, and (10) switching characteristics. Not every data sheet will have all of these pieces, but most of these will be present. Let's look at each of these for the 74LS00.

English-Language Description "These devices contain four independent two-input NAND gates."

The description tells you succinctly what the component does. In the case of a simple logic gate, the description is quite brief. For more complex MSI components, the description can go on for several paragraphs.

Function/Truth Table The function table describes the operation of the component by tabulating all input and output combinations. To avoid confusion over positive and negative logic, the truth table is defined in terms of signal levels, H and L, rather than logic levels, 0 and 1.

Figure 3.41 shows the functional table for the NAND gate. When both inputs are high, the output is low. When an input is low, independent of the other input, the output is high. Writing the truth table for the NAND function in this way is a nice shorthand. For more complex functions, it is more common to take this functional approach than to write down a complete truth table.

Logic Schematics Our example is the simple gate shown in Figure 3.42.

Even in this simple case, the labeling is important because it ties together the functional table and the package pin-out.

Boolean Expression The Boolean expression for the gate is in positive logic. The expression is written in two alternative forms: or .

Package Pin-Out Figure 3.43 shows the standard package pin-out for the 74LS00. Note that there are several alternative package types, so it is always important to refer to the one that matches your particular component. The 74LS00 comes in a 14-pin dip package. The inputs and outputs are labeled by gate number (1 through 4) and the signal names derived from the function table and the logic schematic.

Transistor Schematics The next section of the data sheet describes the internal transistor configurations. These are not important for the purposes of this text.

Absolute Maximum Ratings These ratings are the absolute worst-case conditions under which the component can operate or be stored. They should never be exceeded. The maximum supply voltage for an LS component is 7 V, the maximum input voltage is 5.5 V, the operating free-air temperature is from 0 to 70°C, and the storage temperature can range from -65 to 150°C.

Recommended Operating Conditions These specifications describe the normal operating conditions for the supply voltage, input voltages, output currents, and temperature. Supply voltages are described in terms of minimum, nominal (normal), and maximum settings. For all 74LS components, these are 4.75, 5, and 5.25 V, respectively. This is why TTL is often described as a 5 V technology.

The input voltages, VIH and VIL, describe the minimum voltage that is recognized as a logic 1 and the maximum voltage that is recognized as a logic 0, respectively. For 74LS components, anything above 2 V is a logic 1 and anything below 0.8 V is a logic 0. Voltages between these values will not be recognized as a 1 or a 0.

The output currents, IOH and IOL, describe the maximum currents the gate can supply to maintain the output at a voltage that will be recognized as a logic 1 or 0, respectively. For LS TTL, these are -0.4 mA (current flows from the output pin) and 8 mA (current flows into the output pin). Faster logic families usually have larger absolute values for their output currents.

The operating temperature, TA, defines the recommended temperature range over which to operate the gate. For 74LS components, the operating range is 0 through 70°C.

Electrical Characteristics This section defines several voltages and currents that can be observed at the inputs and outputs of the components. The entries are VOH, the minimum output high voltage, VOL, the maximum output low voltage, IIH, the maximum current into an input pin when the input is high, IIL, the maximum current into an input pin when the input is low, ICCH, the package's power supply current when all outputs are high, and ICCL, the package's power supply current when all outputs are low. The latter two values are per package and must be divided by the number of gates in the package to obtain the current per gate.

For the 74LS components, an output high voltage is 2.7 V minimum, 3.4 V typical. The output low voltage is 0.4 V maximum, 0.25 V typical. These values determine the noise margin. 74LS TTL enjoys a 0.7 V noise margin on logic 1 (2.7-2.0 V) and a 0.4 noise margin on logic 0 (0.8-0.4 V).

The input currents are a maximum of 20 µA for IIH and -0.4 mA for IIL. The power supply currents are 0.8 mA typical, 1.6 mA worst case for high outputs. For low outputs, the supply currents are 2.4 mA typical and 4.4 mA worst case.

Switching Characteristics This section gives the typical and maximum gate delays under specified test conditions of output resistance and capacitance. For example, the test conditions for the 74LS00 entries are a load resistance of 2000 tPLH, the propagation delay to switch the output from a low to a high voltage, and tPHL, the propagation time to switch it from high to low. The low-to-high and high-to-low delays are rarely symmetric. For the 74LS00, the respective specifications are 9 ns and 10 ns typical and 15 ns worst case. Most LS gates have typical delays of approximately 10 ns per gate level.

3.5.2 Simple Performance Calculations

In this subsection we describe some simple calculations you can use to determine the performance of your circuit.

Typical Propagation Delay To compute the typical propagation delay through a gate, take the average of the typical low-to-high and high-to-low propagation delays. For the 74LS00, this would be 9.5 ns. Using typical delays is always somewhat controversial. A truly conservative design would always use the maximum propagation delays.

It is important to note that the delays quoted in the data book are for specific test conditions. Under conditions of increased resistance or capacitance, the delay will be worse than that described in the data book.

Power Consumption Compute steady-state power consumption by multiplying the gate current in holding outputs high or low by the power supply voltage. The nominal power supply voltage is 5 V. The currents are ICCH and ICCL. For the 74LS00, the typical average package power consumption will be

This is the typical power consumption per package. It should be divided by 4 to obtain the power consumption per gate.

Once again, we have computed typical power consumption. A conservative designer would use maximum supply currents to compute worst-case power consumption.

Fan-Out A given TTL output can drive only a finite number of inputs before the output signal levels become degraded and are no longer -recognized as good logic 0's or logic 1's. Determining the fan-out is fairly straightforward. First, examine the (absolute value of) IOH of the driving gate. This value must exceed the sum of the IIH values of the inputs that the gate is driving. Similarly, the IOL of the gate must exceed the (absolute value of the) sum of the IIL values of the inputs to which it is connected.

As an example, let's calculate the fan-out of the 74LS00 NAND gate driving similar gates. The IIH is 20 µA and the IOH is -0.4 mA. This means that an LS NAND gate can drive 20 similar gates to a logic 1. IIL is -0.4 mA while IOL is 8 mA. Once again, an LS NAND gate can drive 20 similar gates to a logic 0.

Let's repeat the calculation for standard TTL. IOH is -0.4 mA and IIH is 40 µA. This indicates that the fan-out is only 10. IIL is -1.6 mA and IOL is 16 mA, also indicating that the fan-out is 10.

Now suppose we have a system with a mixture of LS TTL and standard TTL components. A portion of our design has an LS TTL NAND gate driving some standard TTL inputs. What is the correct maximum fan-out for the LS gate?

When driving the outputs high, the IOH of LS TTL is -0.4 mA. The IIH of standard TTL is 40 µA. This is a fan-out of 10. When driving the outputs low, the IOL of LS TTL is 8 mA. The IIL of standard TTL is -1.6 mA. This is only a fan-out of 5! This example illustrates the importance of determining the correct fan-out of gates, especially when you are using a mixture of TTL technologies.

3.5.3 Inputs and Outputs with Switches and LEDs

A combinational logic circuit is of no use unless you can provide it with inputs and observe its outputs. In this subsection, we will examine how to use switches to provide inputs to a circuit, while a light-emitting diode (LED) can be used to observe the circuit's output.

Single-Pole/Single-Throw Switches A single-pole/single-throw switch has two point connections to the outside. The switch can make or break the connection between these two points.

To implement a useful source of logic 1's and 0's, the switch can be configured as in Figure 3.44.

It works as follows. The symbol that looks like a top is a standard way to represent ground. When the switch is open, ground is disconnected from the output node. The resistor is called a "pull-up" because it brings the voltage on the output node up to something that will be recognized as a logic 1. The box with a number inside it represents a logic probe, and we use it to indicate the logic value on the circuit node it is connected to.

When the switch is closed, the ground potential brings the output node down to a logic 0 voltage. The resistor should be chosen to limit the current between the power supply and ground when the switch is closed. Too small a resistance will cause too much power to be consumed when the switch is closed. If the resistance is set too large, the drop across the resistor may yield a voltage at the circuit input node that is too small to be recognized as a logic 1. A good compromise resistor value for these kinds of pull-ups is 10,000

Single-Pole/Double-Throw Switches A single-pole/double-throw (SPDT) switch has three connections to the outside. Internal mechanics make it possible to connect selectively one of two of the connections to the third connection.

Figure 3.45 shows the SPDT switch configuration. One connection point is wired to the power supply and the other is connected to ground. The switch can be placed in one of two positions. When in the up position, the switch connects the power supply to the output node. The output node is driven to a logic 1 voltage. In the other position, ground is connected to the output. Now the output node is driven to a logic 0 voltage.

Single-Pole/Double-Throw Push-Button A variation on the single-pole/double-throw switch is the momentary contact push-button. This is shown in Figure 3.46.

A distinguished input pole is connected through to the output when the push-button is at rest. When the push- button is pressed, the switch makes a connection between the second input pole and the output. When you release the button, it immediately returns to its rest position.

Light-Emitting Diodes Light-emitting diodes, or LEDs, are electronic elements that emit light whenever a current flows across them. Thus, they are ideal optical output devices. An LED has two connections, called the anode and the cathode. The device is illuminated whenever the anode voltage exceeds the cathode voltage by a certain threshold. The LED is a unidirectional element, so it is important to be able to distinguish between the two connections. The cathode is usually the longer lead or the lead closest to the flat side of the LED's plastic housing.

Figure 3.47 shows one of the many ways in which a TTL gate can drive an LED. In a schematic, an LED is represented as a black triangle facing a line. The anode is the blunt edge of the triangle and the cathode is the flat line.

The LED is illuminated when the switch is set to its upper position. In this case, the inverter's input is a logic 1 and its output is at logic 0. This position ensures that the cathode potential is less than the anode potential.

The LED is dark when the switch is set to its lower position. This position gates a logic 0 to the inverter's input, yielding an output of logic 1. A TTL logic 1 output places too high a voltage on the cathode to allow the LED to light up.

The resistor between the LED and the power supply is called a current-limiting resistor. An unprotected LED wired directly between ground and the power supply would burn out and could destroy the output circuitry of the TTL gate.

We can compute the value for the current-limiting resistor as follows. We size the resistor so that the current across it comes close to but does not exceed the IOL value for the gate that will drive the LED. For example, the IOL of a standard TTL 7404 Inverter gate is 16 mA. The right resistance is 330 ohms.

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This file last updated on 07/07/96 at 18:44:30.
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