List of Figures

Chapter 1: Introduction to Interfacing

Figure 1.1: (a) A 'clone' copy may be made using a digital interconnect between two devices operating at the same sampling rate and resolution. (b) When sampling parameters differ , digital interconnects may still be used, such as in this example, but the copy will not be a true 'clone' of the original.
Figure 1.2: If noise is added to an analog signal the result is a noisy signal. In other words, the noise has become a feature of the signal which may not be separated from it.
Figure 1.3: In pulse amplitude modulation (PAM) a regular chain of pulses is amplitude modulated by the baseband signal.
Figure 1.4: (a) A binary signal is compared with a threshold and reclocked on receipt, thus the meaning will be unchanged. (b) Jitter on a signal can appear as noise with respect to fixed timing. (c) Noise on a signal can appear as jitter when compared with a fixed threshold.
Figure 1.5: When a signal is carried in numerical form, either parallel or serial, the mechanisms of Figure 1.4 ensure that the only degradation is in the conversion process.
Figure 1.6: In asynchronous data transfer each data byte is normally preceded by a start bit and followed by a stop bit to synchronize the receiver.
Figure 1.7: A number of approaches may be used to ensure synchronization in data transfer. (a) Asynchronous transfer relies on transmitter and receiver having identical frequencies, requiring only the receiver's clock phase to be adjusted by the start bit of each byte. (b) In synchronous transfer the data signal is accompanied by a separate clock. (c) A form of synchronous transfer involves modulating the data in such a way that a clock signal is part of the channel code. (d) In the isochronous approach both devices are locked to a common clock.
Figure 1.8: In a serial time-division multiplex a number of input channels share a single high-speed link. Each time slot carries a data packet for each channel.
Figure 1.9: A memory buffer may be used as a temporary store to handle irregularities in data flow. Data samples are written to successive memory locations and read out a short time later under control of the read clock.
Figure 1.10: A simple three-port network has trivial switching requirements.
Figure 1.11: A network implemented with a router or hub.
Figure 1.12: Radial network at (a) has one cable per node. TDM network (b) shares time slots on a single cable.
Figure 1.13: Electrical configuration of an unbalanced interface.
Figure 1.14: Electrical configuration of a balanced interface. (a) Transformer balanced. (b) Electronically balanced.
Figure 1.15: The RS-422 standard allows different cable lengths at different frequencies. Shown here is the guideline for data signalling rate versus cable length when using twisted-pair cable with a wire diameter of 0.51 mm. Longer distances may be achieved using thinner wire.
Figure 1.16: Electrical model of a transmission line.
Figure 1.17: Electrical characteristics of a matched transmission line.
Figure 1.18: A number of connector types are commonly used in digital interfacing. (a) RCA phono connector. (b) BNC connector. (c) XLR connector. (d) D-type connector.
Figure 1.19: Cross-section through a typical optical fibre, and mode of transmission.

Chapter 2: An Introduction to Digital Audio and Video

Figure 2.1: The major types of analog video. Red, green and blue signals emerge from the camera sensors, needing full bandwidth. If a luminance signal is obtained by a weighted sum of R, G and B , it will need full bandwidth, but the colour difference signals RY and BY need less bandwidth. Combining RY and BY in a subcarrier modulation scheme allows colour transmission in the same bandwidth as monochrome.
Figure 2.2a: 2:1 interlace .
Figure 2.2b: In an interlaced system, a given point A is only refreshed at frame rate, causing twitter on fine vertical detail.
Figure 2.3: The major process in PCM conversion. A/D conversion (top) and D/A conversion (bottom). Note that the quantizing step can be omitted to examine sampling and reconstruction independently of quantizing ( dotted arrow).
Figure 2.4: Since sampling and quantizing are orthogonal, the order in which they are performed is not important. At (a) sampling is performed first and the samples are quantized. This is common in audio convertors. At (b) the analog input is quantized into an asynchronous binary code. Sampling takes place when this code is latched on sampling clock edges. This approach is universal in video convertors.
Figure 2.5: The sampling process requires a constant amplitude pulse train as shown at (a). This is amplitude modulated by the waveform to be sampled. If the input waveform has excessive amplitude or incorrect level, the pulse train clips as shown at (b). For an audio waveform, the greatest signal level is possible when an offset of half the pulse amplitude is used to centre the waveform as shown at (c).
Figure 2.6: (a) Spectrum of sampling pulses. (b) Spectrum of samples. (c) Aliasing due to sideband overlap. (d) Beat-frequency production. (e) Four-times oversampling .
Figure 2.7: At (a) the sampling rate is adequate to reconstruct the original signal. At (b) the sampling rate is inadequate, and reconstruction produces the wrong waveform (dotted). Aliasing has taken place.
Figure 2.8: If the above spatial sampling arrangement of 1000 points per centimetre is scanned in 1 millisecond, the sampling rate will become 1 megahertz .
Figure 2.9: The impulse response of a low-pass filter which cuts off at F s / 2 has zeros at 1 /F s spacing which correspond to the position of adjacent samples, as shown at (b). The output will be a signal which has the value of each sample at the sample instant, but with smooth transitions from sample to sample.
Figure 2.10: As filters with finite slope are needed in practical systems, the sampling rate is raised slightly beyond twice the highest frequency in the baseband.
Figure 2.11: The important features and terminology of low-pass filters used for anti-aliasing and reconstruction.
Figure 2.12: In this 4-times oversampling system, the large separation between baseband and sidebands allows a gentle roll-off reconstruction filter to be used.
Figure 2.13: The effect of sampling timing jitter on noise. (a) A ramp sampled with jitter has an error proportional to the slope. (b) When the jitter is removed by later circuits, the error appears as noise added to samples. The superimposition of jitter may also be considered as a modulation process.
Figure 2.14: Crosstalk in transmission can result in unwanted signals being added to the clock waveform. It can be seen here that a low-frequency interference signal affects the slicing of the clock and causes a periodic jitter.
Figure 2.15: Frequency response with 100% aperture nulls at multiples of the sampling rate. The area of interest is up to half the sampling rate.
Figure 2.16: (a) A resampling circuit eliminates transients and reduces aperture ratio. (b) Response of various aperture ratios.
Figure 2.17: At normal speed, the reconstruction filter correctly prevents images entering the baseband, as at (a). (b) When speed is reduced, the sampling rate falls , and a fixed filter will allow part of the lower sideband of the sampling frequency to pass. (c) If the sampling rate of the machine is raised, but the filter characteristics remain the same, the problem can be avoided.
Figure 2.18: An analog parameter is continuous whereas a quantized parameter is restricted to certain values. Here the sloping side of a ramp can be used to obtain any height whereas a ladder only allows discrete heights.
Figure 2.19: Quantizing assigns discrete numbers to variable voltages. All voltages within the same quantizing interval are assigned the same number which causes the DAC to produce the voltage at the centre of the intervals shown by the dashed lines at (a). This is the characteristic of the mid-tread quantizer shown at (b). An alternative system is the mid- riser system shown at (c). Hero 0 volts analog falls between two codes and there is no code for zero. Such quantizing cannot be used prior to signal processing because the number is no longer proportional to the voltage. Quantizing error cannot exceed 0.5Q as shown at (d).
Figure 2.20: At (a) an arbitary signal is represented to finite accuracy by PAM needles whose peaks are at the centre of the quantizing intervals. The errors caused can be thought of as an unwanted signal (b) added to the original.
Figure 2.21: (a) The amplitude of a quantizing error needle will be from -0.5 Q to +0.5 Q with equal probability. (b) White noise in analog circuits generally has Gaussian amplitude distribution.
Figure 2.22: Quantizing produces distortion after the anti-aliasing filter, thus the distortion products will fold back to produce anharmonics in the audio band . Here the fundamental of 15 kHz produces 2nd and 3rd harmonic distortion at 30 and 45 kHz. This results in aliased products at 40-30 = 10 kHz and 4045 = (-)5 kHz.
Figure 2.23: Mathematically derived quantizing error waveform for a sine wave sampled at a multiple of itself. The numerous autocorrelations between quantizing errors show that there are harmonics of the signal in the error, and that the error is not random, but deterministic.
Figure 2.24: Dither can be applied to a quantizer in one of two ways. At (a) the dither is linearly added to the analog input signal whereas at (b) it is added to the reference voltages of the quantizer.
Figure 2.25: Offset binary coding is simple but causes problems in digital audio processing. It is seldom used.
Figure 2.26: Attenuation of an audio signal takes place with respect to midrange .
Figure 2.27: If two pure binary data streams are added to simulate mixing, offset or overflow will result.
Figure 2.28: In this example of a four-bit two's complement code, the number range is from -8 to +7. Note that the MSB determines polarity.
Figure 2.29: (a) Two's complement conversion from binary. (b) Binary conversion from two's complement. (c) Some examples of two's complement arithmetic. (d) Using two's complement arithmetic, single values from two waveforms are added together with respect to midrange to give a correct mixing function.
Figure 2.30: A two's complement ADC. At (a) an analog offset voltage equal to one-half the quantizing range is added to the bipolar analog signal in order to make it unipolar as at (b). The ADC produces positive only numbers at (c), but the MSB is then inverted at (d) to give a two's complement output.
Figure 2.31: The unipolar quantizing range of an eight-bit pure binary system is shown at (a). The analog input must be shifted to fit into the quantizing range, as shown for PAL at (b). In component, sync pulses are not digitized, so the quantizing intervals can be smaller as at (c). An offset of half scale is used for colour difference signals (d).
Figure 2.32: Shortening the word length of a sample reduces the number of codes which can describe the voltage of the waveform. This makes the quantizing steps bigger, hence the term requantizing . It can be seen that simple truncation or omission of the bits does not give analogous behaviour. Rounding is necessary to give the same result as if the larger steps had been used in the original conversion.
Figure 2.33: In a simple digital dithering system, two's complement values from a random number generator are added to low-order bits of the input. The dithered values are then rounded up or down according to the value of the bits to be removed. The dither linearizes the requantizing.
Figure 2.34: In (a) a compression system consists of compressor or coder, a transmission channel and a matching expander or decoder. The combination of coder and decoder is known as a codec. (b) MPEG is asymmetrical since the encoder is much more complex than the decoder.
Figure 2.35: Compression is a old as television. (a) Interlace is a primitive way of halving the bandwidth. (b) Colour difference working invisibly reduces colour resolution. (c) Composite video transmits colour in the same bandwidth as monochrome.
Figure 2.36: (a) A perfect coder removes only the redundancy from the input signal and results in subjectively lossless coding. If the remaining entropy is beyond the capacity of the channel some of it must be lost and the codec will then be lossy. An imperfect coder will also be lossy as it falls to keep all entropy. (b) As the compression factor rises, the complexity must also rise to maintain quality. (c) High compression factors also tend to increase latency or delay through the system.
Figure 2.37: Digital companding. In (a) the encoder amplifies the input to maximum level and the decoder attenuates by the same amount. (b) In a companded system, the signal is kept as far as possible above the noise caused by shortening the sample word length.
Figure 2.38: (a) Spatial or intra-coding works on individual images. (b) Temporal or inter-coding works on successive images. (c) In MPEG inter-coding is used to create difference images. These are the compressed spatially.
Figure 2.39: A motion-compensated compression system. The coder calculates motion vectors which are transmitted as well as being used locally to create a predicted picture. The difference between the predicted picture and the actual picture is transmitted as a prediction error.
Figure 2.40: In bi-directional coding, a number of B pictures can be inserted between periodic forward predicted pictures. See text.
Figure 2.41: Bi-directional coding is very powerful as it allows the same quality with only 40% of the bit rate of intra-coding. However, the encoding and decoding delays must increase. Coding over a longer time span is more efficient but editing is more difficult.
Figure 2.42: Comparison of pictures before and after compression showing sequence change and varying amount of data needed by each picture type. I, P, B pictures use unequal amounts of data.

Chapter 3: Digital Transmission

Figure 3.1: (a) Early optical fibres operated on internal reflection, and signals could take a variety of paths along the fibre, hence multi-mode. (b) Later fibres used graduated refractive index whereby light was guided to the centre of the fibre and only one mode was possible.
Figure 3.2: A transmission line conveys energy packets which appear with respect to the dielectric. In (a) the driver launches a pulse which charges the dielectric at the beginning of the line. As it propagates the dielectric is charged further along as in (b). When the driver ends the pulse, the charged dielectric discharges into the line. A current loop is formed where the current in the return loop flows in the opposite direction to the current in the 'hot' wire.
Figure 3.3: A signal may be square at the transmitter, but losses increase with frequency, and as the signal propagates, more of the harmonics are lost until only the fundamental remains. The amplitude of the fundamental then falls with further distance.
Figure 3.4: A DC offset can cause timing errors.
Figure 3.5: Slicing a signal which has suffered losses works well if the duty cycle is even. If the duty cycle is uneven , as at (a), timing errors will become worse until slicing fails. With the opposite duty cycle, the slicing fails in the opposite direction as at (b). If, however, the signal is DC free, correct slicing can continue even in the presence of serious losses, as (c) shows.
Figure 3.6: (a) Slicing a unipolar signal requires a non-zero threshold. (b) If the signal amplitude changes, the threshold will then be incorrect. (c) If a DC-free code is used, a unipolar waveform can be converted to a bipolar waveform using a series capacitor . A zero threshold can be used and slicing continues with amplitude variations.
Figure 3.7: A certain amount of jitter can be rejected by changing the signal at multiples of the basic detent period T d .
Figure 3.8: A transmitted waveform will appear like this on an oscilloscope as successive parts of the waveform are superimposed on the tube. When the waveform is rounded off by losses, diamond-shaped eyes are left in the centre, spaced apart by the detent period.
Figure 3.9: The complete clock path of a channel coding system.
Figure 3.10: The major components of a channel coding system. See text for details.
Figure 3.11: FM encoding.
Figure 3.12: A channel code can control its spectrum by placing limits on T min ( M ) and T max which define upper and lower frequencies. The ratio of T max / T min determines the asymmetry of waveform and predicts DC content and peak shift.
Figure 3.13: The codebook of the 4/5 code of MADI. Note that a one represents a transition in the channel.
Figure 3.14: Modulo-2 addition with a pseudo-random code removes unconstrained runs in real data. Identical process must be provided on replay.
Figure 3.15: Convolutional randomizing encoder.
Figure 3.16: Concatenation of two words can result in the accidental generation of a word which is reserved for synchronizing.
Figure 3.17: Error-handling strategies can be divided into avoiding errors, detecting errors and deciding what to do about them. Some possibilities are shown here. Of all these the detection is the most critical, as nothing can be done if the error is not detected .
Figure 3.18: Once the position of the error is identified, the correction process in binary is easy.
Figure 3.19: Parity checking adds up the number of ones in a word using, in this example, parity trees. One error bit and odd numbers of errors are detected. Even numbers of errors cannot be detected.
Figure 3.20: An error-correction system can only reduce errors at normal error rates at the expense of increasing errors at higher rates. It is most important to keep a system working to the left of the knee in the graph.
Figure 3.21: A block code is shown in (a). Each location in the block can be a bit or a word. Horizontal parity checks are made by adding P1, P2, etc., and cross-parity or vertical checks are made by adding CP1, CP2, etc. Any symbol in error will be at the intersection of the two failing codewords. In (b) a convolutional coder is shown. Symbols entering are subject to different delays which result in the codewords in (c) being calculated. These have a vertical part and a diagonal part. A symbol in error will be at the intersection of the diagonal part of one code and the vertical part of another.
Figure 3.22: When seven successive bits AG are clocked into this circuit, the contents of the three latches are shown for each clock. The final result is a parity-check matrix.
Figure 3.23: By moving the insertion point three places to the right, the calculation of the check bits is completed in only four clock periods and they can follow the data immediately. This is equivalent to premultiplying the data by x 3 .
Figure 3.24: Circuit of Figure 3.22 divides by x 3 + x + 1 to find remainder. At (b) this is used to calculate check bits. At (c) right, zero syndrome, no error.
Figure 3.25: Codewords are often shortened , or punctured, which means that only the end of the codeword is actually transmitted. The only precaution to be taken when puncturing codes is that the computed position of an error will be from the beginning of the codeword, not from the beginning of the message.
Figure 3.26: The circuit shown is a twisted-ring counter which has an unusual feedback arrangement. Clocking the counter causes it to pass through a series of non-sequential values. See text for details.
Figure 3.27: A Reed-Solomon codeword. As the symbols are of three bits, there can only be eight possible syndrome values. One of these is all zeros, the error-free case, and so it is only possible to point to seven errors hence the codeword length of seven symbols. Two of these are redundant, leaving five data symbols.
Figure 3.28: The bit patterns of a Galois field expressed as powers of the primitive element a . This diagram can be used as a form of log table in order to multiply binary numbers. Instead of an actual multiplication, the appropriate powers of a are simply added.
Figure 3.29: Five data symbols AE are used as terms in the generator polynomials derived in Appendix 3.1 to calculate two redundant symbols P and Q. An example is shown at the top. Below is the result of using the codeword symbols AQ as terms in the checking polynomials . As there is no error, both syndromes are zero.
Figure 3.30: Three examples of error location and correction. The number of bits in error in a symbol is irrelevant; if all three were wrong, S would be 111, but correction is still possible.
Figure 3.31: If locations of errors are known, the syndromes are a known function of the two errors as shown in (a). It is, however, much simpler to set the incorrect symbols to zero, that is, to erase them as in (b). Then the syndromes are a function of the wanted symbols and correction is easier.
Figure 3.32: The interleave controls the size of burst errors in individual codewords.
Figure 3.33: (a) The distribution of burst sizes might look like this. (b) Following interleave, the burst size within a codeword is controlled to that of the interleave symbol size, except for gross errors which have low probability.
Figure 3.34: In block interleaving, data are scrambled within blocks that are themselves in the correct order.
Figure 3.35: In convolutional interleaving, samples are formed into a rectangular array, which is sheared by subjecting each row to a different delay. The sheared array is read in vertical columns to provide the interleaved output. In this example, samples will be found at 4, 8 and 12 places away from their original order.
Figure 3.36: The interleave system falls down when a random error occurs adjacent to a burst.
Figure 3.37: In addition to the r edundancy P on rows, inner redundancy Q is also generated on columns. On replay , the Q code checker will pass on flags F if it finds an error too large to handle itself. The flags pass through the de-interleave pr ocess and are used by the outer error correction to identify which symbol in the row needs correcting with P redundancy. The concept of crossing two codes in this way is called a product code.
Figure 3.38: Network configurations. At (a) the radial system uses one cable to each node. (b) Ring system uses less cable than radial. (c) Linear system is simple but has no redundancy.
Figure 3.39: Receiving a file which has been divided into packets allows for the retransmission of just the packet in error.
Figure 3.40: Files are broken into frames or packets for multiplexing with packets from other users. Short packets minimize the time between the arrival of successive packets. The priority of the multiplexing must favour isochronous data over asynchronous data.
Figure 3.41: In Ethernet collisions can occur because of the finite speed of the signals. A 'back-off' algorithm handles collisions, but they do reduce the network throughput.
Figure 3.42: In a token ring system only the node in possession of the token can transmit so collisions are impossible . In very large rings the token circulation time causes loss of throughput.
Figure 3.43: Program specific information helps the demultiplexer to select the required program.
Figure 3.44: Time stamps are the result of sampling a counter driven by the encoder clock.
Figure 3.45: Transport stream packets are always 188 bytes long to facilitate multiplexing and error correction.
Figure 3.46: Program or system clock reference codes regenerate a clock at the decoder. See text for details.
Figure 3.47: A transport stream multiplexer can handle several programs which are asynchronous to one another and to the transport stream clock. See text for details.
Figure 3.48: A statistical multiplexer contains an arbitrator which allocates bit rate to each program as a function of program difficulty.

Chapter 4: Dedicated Audio Interfaces

Figure 4.1: Format of the standard two-channel interface frame.
Figure 4.2: An example of the bi-phase mark channel code.
Figure 4.3: Three different preambles (X, Y and Z) are used to synchronize a receiver at the starts of subframes.
Figure 4.4: Recommended electrical circuit for use with the standard two-channel interface.
Figure 4.5: The minimum eye pattern acceptable for correct decoding of standard two-channel data.
Figure 4.6: EQ characteristic recommended by the AES to improve reception in the case of long lines (basic sampling rate).
Figure 4.7: The consumer electrical interface (transformer and capacitor are optional but may improve the electrical characteristics of the interface).
Figure 4.8: In broadcasting a coordination link often accompanies the main programme, and cue programme is fed back to the source, also with coordination.
Figure 4.9: The coordination signal is of lower bit rate to the main audio and thus may be inserted in the auxiliary nibble of the interface subframe, taking three subframes per coordination sample.
Figure 4.10: Format of the first three IUs of the consumer user bitstream.
Figure 4.11: An example of user bits formatting in the CD system.
Figure 4.12: Signalling of DAT start and skip IDs in user bits (user bits only shown).
Figure 4.13: Comparison of (a) professional and (b) consumer channel status, bits 116.
Figure 4.14: Overview of the professional channel status block.
Figure 4.15: Format of byte 0 of professional channel status.
Figure 4.16: Format of byte 1 of professional channel status.
Figure 4.17: Format of byte 2 of professional channel status.
Figure 4.18: Format of byte 3 of professional channel status.
Figure 4.19: Format of byte 4 of professional channel status.
Figure 4.20: Overview of the consumer channel status block.
Figure 4.21: Format of byte 0 of consumer channel status.
Figure 4.22: Format of byte 2 of consumer channel status.
Figure 4.23: Format of the data burst in IEC 61937.
Figure 4.24: Conceptual example of AES42 digital microphone interface.
Figure 4.25: Format of the MADI frame.
Figure 4.26: An example of the NRZI channel code.
Figure 4.27: The minimum eye pattern acceptable for correct decoding of MADI data.
Figure 4.28: Block diagram of MADI transmission and reception.
Figure 4.29: SDIF-2 interconnection for two audio channels.
Figure 4.30: At (a) is the clock content of the SDIF signal; (b) shows the synchronizing pattern used for data reception. At (c) user bits form a block that is synchronized every 256 sample periods.
Figure 4.31: Direct Stream Digital interface data is either transmitted 'raw' as shown at (a) or phase modulated as in the SDIF-3 format shown at (b).
Figure 4.32: Format of TDIF data and LRsync signal.
Figure 4.33: Basic format of ADAT data.
Figure 4.34: Data format of the Mitsubishi multitrack interface.
Figure 4.35: Pinouts of the Yamaha two-channel cascade interface.
Figure 4.36: Data format of the Yamaha 'cascade' interface.

Chapter 5: Carrying Real-Time Audio Over Computer Interfaces

Figure 5.1: Data and strobe signals on the 1394 interface can be exclusive-OR'ed to create a clock signal.
Figure 5.2: Typical arrangement of isochronous and asynchronous packets within a 1394 cycle.
Figure 5.3: Example of layered model of 1394 audio/music protocol transfer.
Figure 5.4: AM824 data structure for IEC 60958 audio data on 1394 interface. Other AM824 data types use a similar structure but the label values are different to that shown here.
Figure 5.5: General structure of a compound data block.
Figure 5.6: Specific example of an application-specific data block for multichannel audio transfer from a DVD player.
Figure 5.7: General audio subframe format of AES47.
Figure 5.8: Components of the sequencing word in AES47.
Figure 5.9: Packing of audio subframes into ATM cells . (a) Example of temporal ordering with two channels, left and right. ˜a', ˜b', ˜c', etc., are successive samples in time for each channel. Co-temporal samples are grouped together. (b) Example of multichannel packing whereby concurrent samples from a number of channels are arranged sequentially. (c) Example of ordering by channel, with a number of samples from the same channel being grouped together. (If the number of channels is the same as the number of samples per cell , all three methods turn out to be identical.)

Chapter 6: Practical Audio Interfacing

Figure 6.1: Timing limits recommended for synchronous signals in the AES11 standard.
Figure 6.2: All devices within a studio may be synchronized by distributing an AES11 reference signal to external AES sync inputs (if present).
Figure 6.3: (a) In small systems one of the devices, such as a digital mixer, may act as a sync reference for the others; alternatively, as shown in (b), devices may lock to their AES-format audio inputs, although they may only do so when recording. For synchronous replay, devices normally require a separate external sync input, unless they have been modified to lock to the digital audio input on replay as well.
Figure 6.4: High-frequency loss model used in simulating the effects of cables.
Figure 6.5: A simulation of the effects of high-frequency loss on an AES3-format signal. At (a) the original signal is shown (both polarities are superimposed for clarity), whilst (b) and (c) show the data waveform at link time constants of 200 ns and 50 ns respectively. (Reproduced from J. Dunn, with permission.)
Figure 6.6: Effect of link bandwidth on preamble and data time slot jitter, showing how the Y preamble is affected much less by reduced bandwidth than the data edges. (Reproduced from J. Dunn, with permission.)
Figure 6.7: Effects of sample clock jitter on signal-to-noise ratio at different frequencies, compared with theoretical noise floors of systems with different resolutions . (After W. T. Shelton, with permission.)
Figure 6.8: Sample clock jitter amplitude at different frequencies required for just-audible modulation noise on a worst-case audio signal. (After J. Dunn, with permission.)
Figure 6.9: In one high quality CD player with a separate convertor, rather than deriving the convertor clock from the incoming audio data, the convertor clock is fed back to the transport via a separate interface in order to maintain synchronization of the incoming data.
Figure 6.10: Block diagram of an example of a simple buffer store synchronizer.
Figure 6.11: In video environments all audio, video and timecode sync references should be locked to a common clock.
Figure 6.12: Temporary method of interconnection between consumer and professional interfaces.
Figure 6.13: An example of a circuit suggested by one manufacturer for deriving a balanced digital output from consumer equipment.
Figure 6.14: Examples of impedance matching adaption circuits between professional and consumer devices (a) non-floating, and (b) floating (transformer-balanced) professional sources.
Figure 6.15: An example of a circuit suggested by one manufacturer for converting (a) consumer electrical to consumer optical format, and (b) optical to electrical.
Figure 6.16: This test arrangement is suggested by Cabot for measuring the ability of a device to decode digital input signals at the limits of the eye pattern.
Figure 6.17: In a TDM router, input signals are decoded and multiplexed onto a common high speed bus. Inputs are routed to outputs by extracting data in the appropriate time slot for a particular input channel. Inputs must be synchronous for successful TDM routing.
Figure 6.18: A simple crosspoint router may be used to connect a certain input channel to a certain output channel by selecting the appropriate crosspoint. Asynchronous signals may be handled here.

Chapter 7: Digital Video Interfaces

Figure 7.1: If a video signal is digitized in a standardized way, the resulting data may be electrically transmitted in parallel or serial or sent over an optical fibre.
Figure 7.2: The standard luminance signal fits into eight- or ten-bit quantizing structures as shown here.
Figure 7.3: Spectra of video sampled at 13.5 MHz. In (a) the baseband 525/60 signal at left becomes the sidebands of the sampling rate and its harmonics. In (b) the same process for the 625/50 signal results in a smaller gap between baseband and sideband because of the wider bandwidth of the 625 system. The same sampling rate for both standards results in a great deal of commonality between 50 Hz and 60 Hz equipment.
Figure 7.4: In CCIR-601 sampling mode 4:2:2, the line synchronous sampling rate of 13.5 MHz results in samples having the same position in successive lines, so that vertical columns are generated. The sampling rates of the colour difference signals C R , C B are one-half of that of luminance, i.e. 6.75 MHz, so that there are alternate only samples and co-sited samples which describe , C R and C B . In a run of four samples, there will be four samples, two C R samples and two C B samples, hence 4:2:2.
Figure 7.5: In 420 coding the colour difference pixels are downsampled vertically as well as horizontally. Note that the sample sites need to be vertically interpolated so that when two interlaced fields are combined the spacing is even.
Figure 7.6: The colour difference sampling rate is one-half that of luminance, but there are two colour difference signals, C r and C b , hence the colour difference data rate is equal to the luminance data rate, and a 27 MHz interleaved format is possible in a single channel.
Figure 7.7: (a) In 625 line systems to CCIR-601, with 4:2:2 sampling, the sampling rate is exactly 864 times line rate, but only the active line is sampled, 132 sample periods after sync. (b) In 525 line systems to CCIR-601, with 4:2:2 sampling, the sampling rate is exactly 858 times line rate, but only the active line is sampled, 122 sample periods after sync. Note active line contains exactly the same quantity of data as for 50 Hz systems.
Figure 7.8: In 16:9 working with an 18 MHz sampling rate the sampling structure shown here results.
Figure 7.9: In HD interfaces it is the data rate that is standardized, not the sampling rate. At (a) an 1125/30 picture requires a luma sampling rate of 74.25 MHz to have 1920 square pixels per active line. The data rate of the chroma is the same, thus the interface symbol rate is 148.5 MHz. At (b) with 25 Hz pictures, the symbol rate does not change. Instead the blanking area is extended so the data rate is maintained by sending more blanking. At (c) an extension of this process allows 24 Hz material to be sent.
Figure 7.10: In progressively scanned images, the level of artefacts is much lower than interlaced systems allowing the quality to be maintained with fewer picture lines. At (a) the structure of 720P/60 is shown to have the same data rate as 1080I/30. Lower frame rates are supported by blanking extension as shown in (b).
Figure 7.11: The active line data is bracketed by TRS-ID codes called SAV and EAV.
Figure 7.12: The data bits in the TRS are protected with a Hamming code which is calculated according to the table in (a). Received errors are corrected according to the table in (b) where a dot shows an error detected but not correctable.
Figure 7.13: (a) The four-byte synchronizing pattern which precedes and follows every active line sample block has this structure. (b) The relationships between analog video timing and the information in the digital timing reference signals for 625/50 (above) and 525/60 (below).
Figure 7.14: Decode table for component TRS.
Figure 7.15: The parallel interface was originally specified as in (a) with eight bits expandable to ten. Later documents specify a ten-bit system (b) in which the bottom two bits may be unused. Clock timing at (c) is arranged so that a clock transition occurs between data transitions to allow maximum settling time.
Figure 7.16: As there are two ways to parse ten bits into hexadecimal, there are two numbering schemes in use. In the XYLo system the parsing begins from the MSB down and the Lo parameter is expressed in quarters . In the PQR system the parsing starts from the LSB and so the P parameter has a maximum value of 3.
Figure 7.17: The spectra of NTSC at (a) and of PAL at (b) where both are sampled at four times the frequency of their respective subcarriers. This high sampling rate is unnecessary to satisfy sampling theory, and so both are oversampled systems. The advantages are in the large spectral gap between baseband and sideband which allows a more gentle filter slope to be employed, and in the relative ease of colour processing at a sampling rate related to subcarrier.
Figure 7.18: The composite PAL signal fits into the quantizing range as shown here. Note that there is sufficient range to allow the instantaneous voltage to exceed that of peak white in the presence of saturated bright colours. Values shown are decimal equivalents in a tenor eight-bit system. In a ten-bit system the additional two bits increase resolution, not magnitude, so they are below the radix point and the decimal equivalent is unchanged. PAL samples in phase with burst, so the values shown are on the burst peaks and are thus also the values of the envelope.
Figure 7.19: Obtaining the sample clock in PAL. The values obtained by sampling burst are analysed. When phase is correct, burst will be sampled at zero crossing and sample value will be 64 10 or blanking level. If phase is wrong, sample will be above or below blanking. Filter must ignore alternate samples at burst peaks and shift one sample every line to allow for burst swing. It also averages over several burst crossings to reduce jitter. Filter output drives DAC and thus controls sampling clock VCO.
Figure 7.20: (a) Sample numbering in digital PAL. There are defined to be 1135 sample periods per line of which 948 are the digital active line. This is longer than the analog active line. Two lines per frame have two extra samples to compensate for the 25 Hz offset in subcarrier. NTSC is shown at (b). Here there are 910 samples per line of which 768 are the digital active line.
Figure 7.21: As PAL is sampled half-way between the colour axes, sample sites will fall either side of 50% sync at the zero ScH measurement line.
Figure 7.22: The composite NTSC signal fits into the quantizing range as shown here. Note that there is sufficient range to allow the instantaneous voltage to exceed peak white in the presence of saturated, bright colours. Values shown are decimal equivalents in an eight- or ten-bit system. In a ten-bit system the additional two bits increase resolution, not magnitude, so they are below the radix point and the decimal equivalent is unchanged. * Note that, unlike PAL, NTSC does not sample on burst phase and so values during burst are not shown here. See Figure 7.23 for burst sample details.
Figure 7.23: NTSC ScH phase. Sampling is not performed in phase with burst as in PAL, but on the I and Q axes. Since in NTSC there is a phase angle of 57 between burst and I , this will also be the phase at which burst samples should be taken. If ScH phase is zero, then phase of subcarrier taken at 50% sync will be zero, and the samples will be taken 33 before and 57 after sync; 25 cycles of subcarrier or 100 samples later, during burst, the sample values will be obtained. Note that in NTSC burst is inverted subcarrier, so sample 785 is positive, but sample 885 is negative.
Figure 7.24: Suggested maximum cable lengths as a function of cable type and data rate to give a loss of no more than 30 dB. It is unwise to exceed these lengths due to the 'crash knee' characteristic of SDI.
Figure 7.25: Major components of an SDI link. See text for details.
Figure 7.26: In composite digital it is necessary to insert a sync pattern during analog sync tip to ensure correct deserialization. The location of TRS-ID is shown at (a) for PAL and at (b) for NTSC.
Figure 7.27: The contents of the TRS-ID pattern which is added to the transmission during the horizontal sync pulse just after the leading edge. The field number conveys the composite colour framing field count, and the line number carries a restricted line count intended to give vertical positioning information during the vertical interval. This count saturates at 31 for lines of that number and above.
Figure 7.28: SDTI is a variation of SDI which allows transmission of generic data. This can include compressed video and non-real -time transfer.
Figure 7.29: The HD parallel data are in two channels, each having their own TRS, shown at (a). The EAV is extended by line number and CRC. (b) When the two channels are nultiplexed, the TRS codes are interleaved as shown.
Figure 7.30: A hypothetical 422 system showing applications of various digital interfacing chips.
Figure 7.31: The three data streams from component ADCs can be multiplexed into the parallel interface format with the encoder chip shown here.
Figure 7.32a: An SDI encoder chip from Sony. See text for details.
Figure 7.32b: An SDI encoder chip from Gennum. See text for details.
Figure 7.33: SDI cable driver chip provides correct 0.8 V signal level after source termination resistors.
Figure 7.34: (a) Reclocking SDI receiver contains a cable equalizer and is an important building block for SDI routers as well as being the fast stage of an SDI decoder. Decoder is shown in (b). Note auto standard sensing outputs which can select VCO frequency in the reclocker.
Figure 7.35: Sony SDI receiver chip for comparison with Figure 7.34.
Figure 7.36: This device demultiplexes component data to drive separate DACs for each component as well as stripping out ancillary data.
Figure 7.37: Components of a typical HD-SDI system.
Figure 7.38a: Ancillary data locations for PAL.
Figure 7.38b: Ancillary data locations for NTSC.
Figure 7.39: The different levels of implementation of embedded audio. Level A is default.
Figure 7.40: The different packet types have different ID codes as shown here.
Figure 7.41: AES/EBU data for one audio sample is sent as three nine-bit symbols. A = audio sample. Bit Z = AES/EBU channel status block start bit.
Figure 7.42: The structure of an extended data packet.
Figure 7.43: The structure of an audio control packet.
Figure 7.44: The origin of the frame sequences in 525 line systems.
Figure 7.45: A typical audio insertion unit. See text for details.
Figure 7.46: A typical audio extractor. Note the FIFOs for timebase expansion of the audio samples.
Figure 7.47: A typical EDH system illustrating the way errors are detected and flagged. See text for details.
Figure 7.48: The contents of the EDH packet which is inserted in ancillary data space after the associated field.

Chapter 8: Practical Video Interfacing

Figure 8.1: A router for SDI signals should be constructed as shown here with a reclocker/slicer at each input to restore the received waveform to clean binary logic levels. The routing matrix proper is then a logic element which is followed by SDI line drivers. If this is not done the output cable is electrically in series with the input cable and the performance margin will be impaired. There is no need to descramble or decode the signal as the router is not interested in its meaning.
Figure 8.2: In large systems some care is necessary with signal timing as is shown here. See text for details.
Figure 8.3: Digital routers can operate alongside existing analog routers as an economical means of introducing digital routing.
Figure 8.4: Because of the multiplicative effect of the large number of factors causing signal degradation the error rate increases steeply after a certain cable length. This sudden onset of errors is referred to as the 'crash knee'.
Figure 8.5: In a reclocking repeater the input signal is equalized, sliced and reclocked with a phase-locked loop to recover a clean binary signal which then passes to an SDI line driver.
Figure 8.6: Testing waveforms in the analog domain as shown here reveals nothing about the performance margin of the digital interface.
Figure 8.7: The reception process is deliberately designed to reject analog waveform distortions whereas only by measuring these can signal integrity be assessed. Thus the measurement process is diametrically opposed to normal reception and needs special techniques.
Figure 8.8: In absolute signature analysis (a) the signature at the generator is known and can be compared with the received signature. In relative analysis (b) the signature is unknown but if the generator is known to be static the signature should be constant. Thus changes in the received signature indicate errors.
Figure 8.9: Margin testing requires the cable under test to be broken and a ˜cable clone' or simulator to be inserted as in (a). The cable length is artificially increased until the crash knee is reached. The configuration in (b) is incorrect as the receiver to be used in service is not being tested. In fact the signature analyser's receiver is being tested a meaningless exercise.
Figure 8.10: A video analyser allows a snapshot of digital video interface activity to be captured in RAM. This data can then be inspected at leisure using a small computer.
Figure 8.11: Using a video analyser to set the gain of an ADC. The ADC output data are compared with standard values on a known part of the analog waveform.


Digital Interface Handbook
Digital Interface Handbook, Third Edition
ISBN: 0240519094
EAN: 2147483647
Year: 2004
Pages: 120

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