C Language for FPGA-Based Hardware Design?

Let's think a bit more about the role of Cor lack of a role, as the case may bein hardware design. Why is standard C not appropriate as a replacement for existing hardware design languages? Because any good programming language provides one important thing: a useful abstraction of its target. VHDL and Verilog (or, more precisely, the synthesizable subsets of these languages) succeed very well because they provide a rational, efficient abstraction of a certain class of hardware: level- and edge-sensitive registers with reset and clock logic, arbitrary logic gates, and somewhat larger clocked logic elements arranged in a highly parallel manner. All of today's FPGAs fit this pattern, and it is the pattern also found in the vast majority of today's ASIC designs, no matter how complex.

The standard C language does not provide that level of abstraction (which we call register transfer level, or RTL), so "C-based" languages for hardware could add RTL-like constructs in the form of syntax decorations, extra functions or keywords, compiler hints, and more to create some meaningful way of expressing parallelism and describing low-level hardware structures such as clocks and resets. But in this case we would just have another HDL with new syntax. On the other hand, without the benefit of RTL constructs such as these, the developers of C compilers for FPGAs and other nontraditional targets would face a nearly impossible problem: how to efficiently map algorithms and applications written for one class of processing target (the traditional microprocessor) to something entirely different (arbitrary logic gates and registers combined with somewhat higher-level logic structures). Nobody has yet figured out how to do that mapping from a pure software application with a reasonable level of efficiency, although we are getting better at it.

So why use C at all for FPGA design? There are significant advantages, including the potential for hardware-software codesign, for the creation of test benches written in C, and (if the modified C language supports it) the ability to compile and debug an FPGA application using a standard C development environment. And if a mid-level approach to hardware abstraction is takenone that does not require that the programmer understand all the details of the hardware target, and yet is guided by the programming model toward more appropriate methods of codingyou can strike a balance between software design productivity and hardware design results, as measured in system performance and size.