Introduction

HT, unlike most legacy I/O bus implementations , does not define the use of interrupt pins, nor an interrupt controller. Instead, interrupt delivery is distributed to the HT devices themselves . Each device delivers interrupts by performing memory writes to memory address locations reserved for that purpose. The data written to these locations provides information that historically comes from or is handled by an interrupt controller (such as interrupt priority and vector information that specifies the location of the interrupt service routine). This method of interrupt delivery is commonly referred to as Message Signaled Interrupts.

HT supports message signaled interrupts via two message types:

• Interrupt Request message ” Interrupt requests are forwarded upstream as sized write transactions that target a reserved interrupt request address range. The host bridge receives these packets and based on the target address recognizes the transaction as an interrupt request. The specific actions taken by the bridge to process the interrupt request is platform-specific and not specified.

• End of Interrupt message ” HT also supports an End Of Interrupt (EOI) message that may be used by devices that require confirmation that their interrupt service routine has completed. These messages originate at the host and are forwarded downstream as a broadcast. Like the interrupt request message, the EOI request packet address must also fall within the reserved address range.