4.3 Initialization

   


When an HDSL2 based service is installed, the HDSL2 transceivers need to be configured automatically. The initialization process for an HDSL2 connection has the following phases: "Wake-up," preactivation , core activation, and data mode. A typical startup time for HDSL2 initialization may range from 15 to 30 seconds. This section provides a brief overview of the HDSL2 initialization procedure.

The main objectives of the initialization process are to

  • Determine the operation settings, for example, the transmit signal power level.

  • Train the core transceiver block components , for example, the echo canceler, equalizer, and so on.

  • Exchange key system parameters, for example, channel precoder coefficients, coefficients to the rate one-half convolutional encoder in the trellis encoder, and so on.

  • Transition seamlessly to data mode.

To maximize robustness in the initialization process, the HDSL2 transceiver operates using two-level PAM, because it can operate with the lowest SNR of the multilevel PAM configurations. The transmitter structure at initialization is at its simplest, that is, it basically consists of a scrambler, bit-to-symbol map, and transmit shaping filter. Figure 4.25 shows the transmitter reference model of the HDSL2 transmitter during initialization. The input sequence is either the "all ones" sequence or the "activation frame" that passes transceiver parameters.

Figure 4.25. HDSL2 reference transmitter during startup.

graphics/04fig25.gif

Figure 4.26 shows the timing diagram of the initialization sequence. The diagram shows sequences in the preactivation and core activation phases; at the completion of the core activation phase, the modems transition into data mode.

Figure 4.26. Initialization sequence timing diagram.

graphics/04fig26.gif

Sequences A r and B c are generated by sending the "all ones" pattern to the scrambler in the reference startup transmitter model of Figure 4.25. The resulting line signal is 2-PAM. These signals serve primarily as alert (wake-up) and response signal. The receiver can measure receive signal level for determining the level of transmit signal power. The duration of these sequences are 200 ms each.

Sequences A r ' and B c ' offer a slight extension to those of A r and B c . Although the two-level PAM sequences for A r ' and B c ' are generated in the same manner as for A r and B c by inputting the all ones pattern into the scrambler of the reference startup transmitter, the resulting PAM sequence is amplitude modulated with a binary sequence to transmit a preactivation frame that identifies the transmit signal power level. The modulation format of the two-level PAM signal is as follows :

  • Each bit has a 10 msec period.

  • A logic 1 is the two-level PAM sequence sent at maximum transmit power (i.e., 0 dB power cutback).

  • A logic 0 is the two-level PAM sequence sent at 7 dB reduced transmit power (i.e., 7 dB power cutback).

Within this sequence, the CO and CP (customer premises) units transmit a preactivation frame that defines the transmit signal power for the corresponding far end transmitters. The power levels are determined based on the level of the received signals during A r and B c sequence exchange. The 20 preactivation frame bits are allocated as follows:

  • 2 bits to identify the frame start

  • 1 bit for CRC error indication

  • 4 bits for mask indication (i.e., power cutback level)

  • 4 bits for CRC-4

  • 9 bits reserved (undefined)

The HDSL2 standard defines sixteen levels of power cutback, which range from 0 to 15 dB of cutback in increments of 1 dB steps. Each level of power cutback can be viewed as an array of PSD masks, msk0 “msk15, where the integer represents the level of power cutback. Once the sequences of A r ' and B c ' have completed and the power cutback levels have been set, the core transceiver training begins. All core activation sequences that follow are sent using the corresponding power cutback levels transmitted during the A r ' and B c ' exchange.

Core initialization begins with the CP unit transmitting sequence C r for a period of 1 second. The CO unit may use the received sequence to perform timing recovery and train its equalizer. The CP unit may use this sequence to train an echo canceller. The duration of C r is 300 ms nominal.

Upon the completion of sequence C r , the CO unit begins sending sequence S c one-half second later. Sequence S c is the two-level PAM signal formed by inputting ones into the scrambler of the reference startup transmitter. Recall that the transmit power is set to the value specified in the preactivation frame sent during the A r ' and B c ' exchange. For the first second, S c is the only signal on the line. The CP unit may train its equalizer and timing recovery circuit from the received signal; during this same time, the CO unit may train its echo canceler. After one second later, the CP unit begins transmitting Sequence S r , and now there is simultaneous transmission of both upstream and downstream data. The sequence S c is transmitted for a minimum of 5 seconds, which is the time required (timer T PLL ) for the CP unit to synchronize its phase locked loop.

Sequence S r is also a two-level PAM signal resulting from an input of ones into the scramble of the reference startup transmitter, and the transmit power is that specified in the pre-activation frame sent during the A r ' and B c ' exchange. The CP unit begins transmitting about 1.5 seconds after it concludes transmitting C r . During the period of simultaneous S c and S r transmission, the transceivers continue training their equalizer, echo canceler, and other necessary functions. If the transceiver functions have not converged by conclusion of S c and S r , then the transceiver enters an exception state. At that point the initialization process would need to be restarted.

After the CO unit transceiver has converged and it has been sending the S c signal for at least 5 seconds (i.e., the value of the T PLL timer), it transitions to sending signal T c . During the transmission of T c , the channel precoder coder coefficients and other system information is sent to the CP unit from the CO unit. Once the CP unit has converged and has begun detecting the T c signal, it begins transmitting the T r signal to the CO unit. As with T c , the T r signal passes the channel precoder coefficients and other signal parameters to the CO transceiver. The information transferred in the T c and T r signals is contained in a core activation frame.

Once the CO unit has detected the T r signal and has completed transmission of the core activation frame, it begins sending signal F c . Signal F c sends the core-activation frame of T c except that the frame sync word is reversed and all of the remaining information bits are set to arbitrary values. Two of these frames are sent during F c , and this can serve as an acknowledgment that the CO unit received T r .

Upon conclusion of S c transmission, the CO unit begins sending data, and the CP unit begins sending data upon completion of T r .


   
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DSL Advances
DSL Advances
ISBN: 0130938106
EAN: 2147483647
Year: 2002
Pages: 154

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