D.8 System Information Registers

The Itanium architecture makes visible to application programs certain information about the hardware implementation and its performance.

The cpuid (processor identification) registers provide software-readable information about the CPU chip: maker, revision level of Itanium architecture that it implements, and other data, such as processor family and model. Such information can be used by software to infer the presence or absence of any implementation-dependent features that must be taken into consideration by that software. Early Itanium processor implementations contain five cpuid registers.

The pmd (performance monitor data) registers gather certain information as the processor runs. Essentially these are counters that record aspects of system performance that can potentially be used for application tuning. An operating system can permit read-only access to these registers by user-level code. The architecture provides for up to 256 such registers, each 64 bits wide, and requires that at least eight of them be implemented.