47.

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It is a riddle wrapped in a mystery inside an enigma.

- Sir Winston Churchill

Introduction

In the previous chapter, we introduced the basic methods for describing Boolean functions as minimized two-level networks constructed from AND, OR, and NOT gates. In this chapter, we extend the discussion in three main directions:

The conversion of AND/OR and OR/AND networks to NAND-NAND and NOR-NOR networks. AND and OR gates are rarely used in digital systems; you must learn how to convert them to networks with NAND and NOR gates.

Design strategies for implementing logic in more than two levels. Just as a complex algebraic expression can be simplified by factoring out common subexpressions, you can implement a Boolean function in fewer gates if you factor it judiciously. This leads to a fundamental trade-off between time (more levels of logic to pass through) and space (fewer gates needed to implement the function).

Computer-aided design tools. Multilevel logic depends on more sophisticated methods for finding an efficient design solution. We examine misII, a computer-based tool for performing multilevel logic design.

• Time response in digital networks. We will look more closely at the dynamic behavior of combinational logic gates. Hazards, which cause undesirable transitions at the outputs, can lead to improper circuit behavior. You will learn the procedures for obtaining hazard-free designs.

Table of Contents

3.1. Multilevel Logic
3.2. CAD Tools for Multilevel Logic
3.3. Time Response in Combinational Networks
3.4. Hazards/Glitches and How to Avoid Them
3.5. Practical Matters
Chapter Review
Exercises

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This file last updated on 07/07/96 at 18:44:30.
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