of Example A.18.

A.3 Makefiles

The make utility, which allows users to incrementally recompile a collection of program modules, is convenient and helps avoid mistakes. To use make , you must specify dependencies among modules in a description file . The make utility uses the description file to see if anything needs updating.

The description file specifies dependency relationships that exist between targets and other components . Lines starting with # are comments. The dependencies in the description file have the following form.

 target:          components TAB              rule 

The first line is called a dependency , and the second line is called a rule . The first character on a rule line in a description file must be the TAB character . A dependency may be followed by one or more rule lines.

The default description filenames are makefile and Makefile . When the user types make with no additional arguments, the make utility looks for makefile or Makefile in the current directory to use as its description file.

Example A.17

In Example A.6, the executable mine depends on the object files mine.o and minelib.o . The following description specifies that dependency relationship.

 mine:   mine.o minelib.o         cc -o mine mine.o minelib.o 

The dependency relationship specifies that the target mine should be updated by executing the rule cc -o mine mine.o minelib.o if either mine.o or minelib.o has been modified since mine was last changed,

Figure A.2. A dependency graph for the makefile of Example A.18.

Example A.18

A makefile target may depend on components that are themselves targets. The following makefile description file has three targets.

 my:     my.o mylib.o         cc -o my my.o mylib.o my.o:   my.c myinc.h         cc -c my.c mylib.o:  mylib.c myinc.h         cc -c mylib.c 

The target my depends on the targets my.o and mylib.o . Just type make to do the required updates.

Sometimes it is helpful to visualize the dependencies of a description file by a directed graph. Use graph nodes (with no duplicates) to represent the targets and components. Draw a directed arc from node A to node B if target A depends on B. A proper description file's graph should have no cycles. Figure A.2 shows the dependency graph for the description file of Example A.18.

Description files can also contain macro definitions of the following form.

 NAME = value 

Whenever $(NAME) appears in the description file, make substitutes value before processing. Do not use tabs in macros.

Example A.19

The following description file uses a macro to represent the compiler options. With this definition, the compiler options need only be changed in a single place rather than in the entire file.

 OPTS = -g my:     my.c  my.h         cc $(OPTS) -o my my.c 

The make command also allows the name of a target to be specified on the command line. In this case, make updates only the specified target. When developing multiple targets in the same directory (e.g., send and receive programs), use this feature to debug one target at a time. If no targets are explicitly specified on the command line, make checks only the first target in the description file. Often, a description file has a first target called all that depends on all the other targets.

Example A.20

The following command causes make to update only the target my .

 make my 

The command of Example A.20 does not interpret my as a description file but as a target within the default description file (either makefile or Makefile in the current directory).

Use the -f option with make for description files with names other than makefile or Makefile .

Example A.21

The following command updates target1 from the description file mymake .

 make -f mymake target1