Chapter 4

A1:

a. 16; b. 64.

A2:

24 x 5; 7.

A3:

Suppose you have the number expressed as a 64-bit two's complement integer. If it is positive by inspection, where do you encounter the first 1 bit in moving from left to right? Firm up that idea. Now, if it is negative by inspection, see whether you can argue successfully that the place where you encounter the first 0 bit in moving from left to right will be important. Firm up that idea.

A4:

Since the actual destination would be a field of bits within the instruction, what would happen if that instruction were encountered again (as in a loop structure)?

A5:

How many values need codes? How many bits are allocated? How many codes can those bits provide?

A6:

Consider that 10 can be obtained in several ways, including 9 + 1, 8 + 2, 5 x 2, etc.

A7:

We expected a positive result of the same magnitude, but we got back the same negative value.

A8:

add.

A9:

The calculation looks like this:

2

==>

110

==>

110

3

==>

011

==>

+ 101

  

011

 

011

And we see that the sign of the result is different from the signs of the two values being added (columns at the right).

A11:

Hint: For B, the 32-byte line size of L1-D cache might hold some floating-point values that cannot use that route into the datapath anyway.

A12:

For part c, refer back to exercise 6. Or, with some lack of generality for big numbers, what else could you consider from later in this chapter?

A13:

teff = 0.20 x tmain + 0.10 x tmain = 0.3 x tmain; 0.25 x tmain.

A14:

12.2 ns. The generalized formula is teff = h1 x t1 + (1 h1) x h2 x t2 + … + (1 h1) x (1 h2) x … x (1 h n 1) x tn.

A15:

a. 0123 4567 FFFF FFFF; b. FFFF FFFF 7654 3210.

A16:

a. 0000 0000 89AB CDEF; b. 0000 0000 FEDC BA98.

A19:

The code could combine some features of the two programs presented in this chapter.

A20:

Consider the size of an address for the architecture.

A21:

Carefully consider a reversal in the order of the instructions of the examples given at the end of the chapter.

A22:

Make sure that you handle two's complement numbers of various widths correctly.



ItaniumR Architecture for Programmers. Understanding 64-Bit Processors and EPIC Principles
ItaniumR Architecture for Programmers. Understanding 64-Bit Processors and EPIC Principles
ISBN: N/A
EAN: N/A
Year: 2003
Pages: 223

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