Chapter 2

A1:

What conflicts would result if these principal structures were visible?

A2:

How many different buses are there on a typical "IBM-compatible" PC? Does the same software run on these machines with different buses?

A3:

37.

A4:

Is a human memory addressed by storage locations or by contents?

A5:

16; 0 … 15.

A6:

At least 17 bits are needed.

A7:

Play the role of the computer, following the process of fetching and executing an instruction.

A8:

Every instruction could contain the address of the next instruction.

A9:

16 TiB; 1 PiB.

A10:

46.

A11:

Perhaps first compute 96 ln 2.

A12:

There are four information units and at least five data types for the Itanium architecture discussed in this chapter.

A13:

Consider, by analogy, whether the decimal numbers 5 x 102 and 5.00 x 102 express the same thing.

A14:

40200000; 40266666.

A15:

Are the representations the same as for exercise 14?

A16:

224 1.

A17:

Consider the difference between a byte stream and integers represented by more than 8 bits.

A18:

Use the table provided.

A19:

124F.

A20:

What happens if you subtract 0x30 from the code?



ItaniumR Architecture for Programmers. Understanding 64-Bit Processors and EPIC Principles
ItaniumR Architecture for Programmers. Understanding 64-Bit Processors and EPIC Principles
ISBN: N/A
EAN: N/A
Year: 2003
Pages: 223

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