Server Processor Overview


The following tables provide you with a quick overview of the processor families that are considered in this chapter: Intel, AMD, Alpha, PA-RISC, MIPS, PowerPC, and Power.

Note

The Alpha, PA-RISC, and MIPS processor lines are in the process of being phased out by their respective manufacturers. However, they will continue to be available at least through 2006, and existing systems will likely require support for several years to come.


Table 2.1 lists the major specifications of Intel processors that have been used as server processors, starting with the Intel Pentium Pro. Table 2.1 includes both processors originally designed as desktop processors and those designed as server processors. Because Intel uses the same brand name for processors with distinctly different features, the code name used to refer to a particular server processor's core design is provided in parentheses.

Table 2.1. Intel Server Processor Specifications

Processor

SMP Support[1]

Dual-Core

Process (Micron)

Clock Multiplier

Clock Speeds

Voltage

Internal Register Size

Data Bus Width

Max. Memory

L1 Cache

L2 Cache

L3 Cache

Cache Speed

L2/L3 Multimedia Instructions

No. of Transistors

Date Introduced

Pentium Pro

Yes

No

0.35

2x+

150200MHz

3.3V

32-bit

64-bit

64GB

2x8KB

256KB, 512KB, 1MB

Core[2]

5.5 million

Nov. 1995

Pentium II (Klamath)

Yes

No

0.35

3.5x+

233300MHz

2.8V

32-bit

64-bit

64GB

2x16KB

512KB

1/2 core

MMX

7.5 million

May 1997

Pentium II (Deschutes)

Yes

No

0.35

3.5x+

266MHz450MHz

2.0V

32-bit

64-bit

64GB

2x16KB

512KB

1/2 core

MMX

7.5 million

May 1997

Pentium II Xeon (Deschutes)

Yes

No

0.25

4x+

400450MHz

2.8V

32-bit

64-bit

64GB

2x16KB

512KB, 1MB, 2MB

Core[2]

MMX

7.5 million

June 1998

Pentium III (Katmai)

Yes

No

0.25

4x+

600MHz

2.0V2.05V

32-bit

64-bit

64GB

2x16KB

512KB

1/2 core

SSE

9.5 million

Feb. 1999

Pentium III Xeon (Tanner)

Yes

No

0.25

5x+

500550MHz

2.0V

32-bit

64-bit

64GB

2x16KB

512KB, 1MB, 2MB

Core[2]

SSE

9.5 million

Mar. 1999

Pentium III (Coppermine)

Yes

No

0.18

4x+

1.133GHz

1.6V1.75V

32-bit

64-bit

64GB

2x16KB

256KB

Core

SSE

28.1 million

Oct. 1999

Pentium IIIE Xeon (Cascades)

Yes

No

0.18

4.5x+

6001GHz

1.65V

32-bit

64-bit

64GB

2x16KB

256KB, 1MB, 2MB

Core

SSE

28.1 million, 84 million, 140 million

Oct. 1999, May 2000

Pentium III (Tualatin)

Yes

No

0.13

8.5x+

1.4GHz

1.45V

32-bit

64-bit

64GB

2x16KB

512KB

Core

SSE

44 million

June 2001

Pentium 4 (Willamette)

No

No

0.18

3x+

2GHz

1.7V

32-bit

64-bit

64GB

12+8KB

256KB

Core

SSE2

42 million

Nov. 2000

Xeon DP, MP (Foster)

Yes

No

0.18

3.5x+

1.42GHz

1.75V

32-bit

64-bit

64GB

12+8KB

256KB, 512KB, 1024KB

Core

SSE2

42 million

May 2001

Pentium 4A (Northwood)

No

No

0.13

4x+

3.4GHZ

1.3V

32-bit

64-bit

64GB

12+8KB

512KB

Core

SSE2

55 million

Jan. 2002

Xeon DP (Prestonia)

Yes

No

0.13

4.5x+

1.63.066GHz

1.5V

32-bit

64-bit

64GB

12+8KB

512KB

0MB, 1MB, 2MB

Core

SSE2

169 million

Jan. 2002

Pentium 4EE (Prestonia)

No

No

0.13

8x+

3.73GHz

1.5V

32-bit

64-bit

64GB

12+8KB

512KB

2GB

Core

SSE2

178 million

Nov. 2003

Pentium 4E (Prescott)

No

No

0.09

8x+

3.8GHz

1.3V

32-bit, 64-bit

64-bit

64GB

12+16KB

1MB

Core

SSE3

125 million

Feb. 2004

Xeon MP (Gallatin)

Yes

No

0.13

3.75+

3.0663.2GHz

1.475V, 1.5V

32-bit

64-bit

64GB

12+8KB

512MB

0MB, 1MB, 2MB, 4MB

Core

SSE2

178 million

Nov. 2002

Xeon DP (Nocona)

Yes

No

0.09

3.5x+

3.03.6GHz

1.25V1.4V

64-bit

64-bit

64GB

12+16KB

512MB, 1MB

1MB

Core

SSE3

125 million

Jun. 2004

Xeon DP (Irwindale)

Yes

No

0.09

3.5x+

3.03.6GHz

1.25V1.4V

64-bit

64-bit

64GB

12+16KB

512MB, 1MB

2MB

Core

SSE3

169 million

Feb. 2005

Pentium D (Smithfield)

No

Yes

0.09

3.5x+

3.2GHz

1.25V1.4V

32-bit, 64-bit

64-bit

64GB

12+16KB (x2)

1MB (x2)

Core

SSE3

250 million

Apr. 2005

Pentium EE (Glenwood)

No

Yes

0.09

4x

3.46GHz

1.25V1.4V

32-bit, 64-bit

64-bit

64GB

12+16KB (x2)

1MB (x2)

Core

SSE3

250 million

Apr. 2005

Xeon MP (Paxville)

Yes

Yes

0.09

3.5x

2.6673GHz

1.25V1.4V

32-bit, 64-bit

64-bit

64GB

12+16KB (x2)

2MB (x2)

Core

SSE3

200 million

Oct. 2005

Itanium (Merced)

Yes

No

0.18

3x+

800MHz

1.6V

64-bit

64-bit

16TB

2x16KB

96KB[2]

2MB, 4MB

Core

MMX

25 million

May 2001

Itanium 2 (McKinley)

Yes

No

0.18

3x+

1GHz

1.6V

64-bit

128-bit

16TB

2x16KB

256KB

1.5MB, 3MB

Core

MMX

221 million

July 2002

Itanium 2 (Madison)

Yes

No

0.13

3x+

1.67GHz

1.6V

64-bit

128-bit

16TB

2x16KB

256KB

1.5MB, 6MB

Core

MMX

410 million

June 2003


[1] Key: FPU = floating-point unit (internal math coprocessor); WT = Write-Through cache (caches reads only); WB = Write-Back cache (caches both reads and writes); M = millions; Bus = processor external bus speed (motherboard speed); Core = Processor internal core speed (CPU speed); typically on-die; MMX = multimedia extensions (57 additional instructions for graphics and sound processing); 3DNow! = MMX plus 21 additional instructions for graphics and sound processing; Enh. 3DNow! = 3DNow! plus 24 additional instructions for graphics and sound processing; 3DNow! Pro = Enh. 3DNow! plus SSE instructions for graphics and sound processing; SSE = Streaming SIMD (single instruction multiple data) Extensions (MMX plus 70 additional instructions for graphics and sound processing); and SSE2 = Streaming SIMD Extensions 2 (SSE plus 144 additional instructions for graphics and sound processing); SMP = supports symmetric multiprocessing (two or more processors).

[2] L2 cache runs at full-core speed but is contained in a separate chip die.

Note

Table 2.1 excludes the 8088 through 80486 and Pentium processors, none of which are likely to be encountered today. It also excludes laptop-specific CPUs (such as the Pentium M) and the Intel Celeron family of low-cost and reduced-cache versions of the Pentium, Pentium II, Pentium III, and Pentium 4 processor families; the Celeron family is marketed exclusively as a desktop processor and is thus not likely to be encountered in a server.


Table 2.2 lists the AMD processors, starting with the AMD Athlon MP, that have been used in servers. As with Table 2.1, the core design is listed in parentheses in the Processor column.

Table 2.2. AMD Server Processor Specifications

Processor

SMP Support[1]

Process (Micron)

Clock Multiplier

Maximum Clock Speeds

Voltage

Internal Register Size

Data Bus Width

Max. Memory

L1 Cache

L2 Cache

L3 Cache

L2/L3 Cache Speed

Multimedia Instructions

No. of Transistors

Date Introduced

AMD Athlon MP (Palomino)

Yes

0.18

5x+

1.733GHz

1.5V1.8V

32-bit

64-bit

4GB

2x64KB

256KB

Core

3DNow! Pro

37.5 million

June 2001

AMD Athlon MP (Thoroughbred)

Yes

0.13

5x+

2.133GHz

1.5V1.8V

32-bit

64-bit

4GB

2x64KB

256KB

Core

3DNow! Pro

37.2 million

Aug. 2002

AMD Athlon MP (Barton)

Yes

0.13

5.5x+

2.133GHz

1.65V

32-bit

64-bit

4GB

2x64KB

512KB

Core

3DNow! Pro

54.3 million

May. 2003

AMD Opteron (SledgeHammer)

Yes

0.13

3.5x+

1.42.4GHz

1.55V

64-bit

128-bit

1TB

2x64KB

1MB

Core

3DNow! Pro

105.9 million

Apr. 2003

AMD Opteron 1xx (Venus)

No

0.09

3.5x+

1.82.8GHz

1.351.4V

64-bit

128-bit

1TB

2x64KB

1MB

Core

SSE3

105.9 million

May. 2004

AMD Opteron 2xx (Troy)

Yes

0.09

3.5x+

1.82.8GHz

1.35V

64-bit

128-bit

1TB

2x64KB

1MB

Core

SSE3

105.9 million

May. 2004

AMD Opteron 3xx (Athens)

Yes

0.09

3.5x+

1.82.8GHz

1.35V

64-bit

128-bit

1TB

2x64KB

1MB

Core

SSE3

105.9 million

May. 2004

AMD Opteron 1xx dual-core (Denmark)

No

0.09

3.5x+

1.62.4GHz

1.35V

64-bit

128-bit

1TB

2x64KB (x2)

1MB (x2)

Core

SSE3

233.2 million

Apr. 2005

AMD Opteron 2xx dual-core (Italy)

Yes

0.09

3.5x+

1.62.4GHz

1.35V

64-bit

128-bit

1TB

2x64KB (x2)

1MB (x2)

Core

SSE3

233.2 million

Apr. 2005

AMD Opteron 8xx dual-core (Egypt)

Yes

0.09

3.5x+

1.62.4GHz

1.35V

64-bit

128-bit

1TB

2x64KB (x2)

1MB (x2)

Core

SSE3

233.2 million

Apr. 2005


[1] Key: FPU = floating-point unit (internal math coprocessor); WT = Write-Through cache (caches reads only); WB = Write-Back cache (caches both reads and writes); M = millions; Bus = processor external bus speed (motherboard speed); Core = Processor internal core speed (CPU speed); typically on-die; MMX = multimedia extensions (57 additional instructions for graphics and sound processing); 3DNow! = MMX plus 21 additional instructions for graphics and sound processing; Enh. 3DNow! = 3DNow! plus 24 additional instructions for graphics and sound processing; 3DNow! Pro = Enh. 3DNow! plus SSE instructions for graphics and sound processing; SSE = Streaming SIMD (single instruction multiple data) Extensions (MMX plus 70 additional instructions for graphics and sound processing); and SSE2 = Streaming SIMD Extensions 2 (SSE plus 144 additional instructions for graphics and sound processing); SMP = supports symmetric multiprocessing (two or more processors).

Note

Table 2.2 omits the Pentium-equivalent K5 and K6 families; laptop-specific versions of all CPUs; the Duron and Sempron families, which are lower-performance, low-cost versions of the Athlon; and the Athlon XP and Athlon 64 processors, which are sold strictly as desktop processors.


Note

Note in Table 2.1 that the Pentium Pro processor includes 256KB, 512KB, or 1MB of full-core-speed L2 cache in a separate die within the chip. The earlier Pentium II/III processors include 512KB of half-core-speed L2 cache on the processor card. Pentium II PE and Pentium IIIE and IIIB processors include full-core-speed L2 cache integrated directly within the processor die. The later Pentium 4A includes 512KB of on-die full-core-speed L2 cache.

The transistor count figures in Table 2.1 do not include the external (off-die) 256KB, 512KB, 1MB, or 2MB L2 cache built in to the Pentium Pro, Pentium II/III, or PII/PIII Xeon, or the L3 cache in the Itanium. The external L2 cache in those processors contains an additional 15.5 million (256KB), 31 million (512KB), 62 million (1MB), or 124 million (2MB) transistors in separate chips, whereas the external 2MB or 4MB of L3 cache in the Itanium includes up to 300 million transistors.


Table 2.3 lists the major features of Alpha processors used in servers from 1996 to the present.

Table 2.3. Specifications of Alpha Server Processors, 1996Present

Processor

Multi-processor Support

Clock Speed

Internal Register Size

Data Bus Width

Max. Memory

L1 Cache

L2 Cache

L3 Cache

No. of Transistors

Date Introduced

Alpha 21164 (EV-5)[1]

Yes

366600MHz

64-bit

128-bit

1TB

8KB-Instructions, 8KB-Data

96KB

1MB to 64MB off-die

9.6 million

1996

Alpha 21264 (EV-6)[1]

Yes

466575MHz

64-bit

64-bit

16TB

128KB

Off-chip

15.2 million

1998

Alpha 21264A (EV-67)[2] (.25 micron)

Yes

600833MHz

64-bit

64-bit

16TB

128KB

Off-chip

15.2 million

1999

Alpha 21264B (EV-68C)[3]

Yes

833MHz

64-bit

64-bit

16TB

128KB

Off-chip

15.2 million

2001

Alpha 21264C (EV68CD)[3]

Yes

11.25GHz

64-bit

64-bit

16TB

128KB

Off-chip

15.2 million

2001

Alpha 21364 (EV-7 series)[3]

Yes

1.11.3GHz

64-bit

64-bit

16TB

128KB

1.75MB

100 million

2002


[1] These processors were built using .35-micron process technology.

[2] This processor was built using .25-micron process technology.

[3] These processors were built .18-micron process technology.

Table 2.4 lists the specifications for PA-RISC 8xxx-series server processors from 1996 to the present.

Table 2.4. Specifications of PA-RISC 8xxx Server Processors, 1996Present

Processor

PA-RISC Version

Multi-processor Support

Maximum Clock Speed

Internal Register Size

Data Bus Width

Max. Memory

Max. L1 Cache

L2 Cache

No. of Transistors

Date Introduced

PA-8000[1] (Onyx)

2.0

Yes

230MHz

64-bit

64-bit

1TB

1MB off-chip

3.8 million

1996

PA-8200[1] (Vulcan)

2.0

Yes

300MHz

64-bit

64-bit

1TB

4MB off-chip

3.8 million

1997

PA-8500[2] (Vulcan)

2.0

Yes

440MHz

64-bit

64-bit

1TB

1.5MB

140 million

1998

PA-8600[2] (Landshark)

2.0

Yes

550MHz

64-bit

64-bit

1TB

1.5MB

140 million

1999

PA-8700[3] (Piranha)

2.0

Yes

875MHz

64-bit

64-bit

16TB

2.25MB

186 million

2001

PA-8800[4],[5]

2.0

Yes

1GHz

64-bit

64-bit

16TB

3MB

32MB off-chip

300 million

2002

PA-8900[4],[5]

2.0

Yes

1.1GHz

64-bit

64-bit

16TB

3MB

64MB off-chip

317 million

2005


[1] These processors were built using .50-micron process technology.

[2] This processor was built using .25-micron process technology.

[3] These processors were built using .18-micron process technology.

[4] These processors were built using .13-micron silicon-on-insulator (SOI) process technology.

[5] Dual-core processor.

Table 2.5 lists the specifications for MIPS server processors from 1994 to the present.

Table 2.5. Specifications of MIPS Server Processors, 1994Present

Processor

Multi-processor Support

Maximum Clock Speed

Internal Register Size

Data Bus Width

Max. Memory

L1 Cache

L2 Cache (off-chip)

No. of Transistors

Date Introduced

R10000[1]

Yes

250MHz

64-bit

64-bit

16GB

64KB

12MB

6.8 million

1994

R12000[2]

Yes

400MHz

64-bit

64-bit

16GB

64KB

18MB

6.8 million

1998

R14000[3]

Yes

600MHz

64-bit

64-bit

16GB

64KB

416MB

7.2 million

2001

R16000[3]

Yes

700MHz

64-bit

64-bit

16GB

64KB

416MB

7.2 million

2002


[1] This processor was built using .35-micron process technology.

[2] This processor was built using .25-micron process technology.

[3] These processors were built using .13-micron process technology.

IBM's line of Power architecture processors for the RS/6000 and p5 server lines provided the basis for the PowerPC series of processors. Table 2.6 lists the specifications for Power Architecture server processors from 1996 to the present.

Table 2.6. Specifications of Power Architecture Processors, 1996Present

Processor

Multi-processor Support

Clock Speeds

Internal Register Size

Data Bus Width

Max. Memory

L1 Cache

L2 Cache

L3 Cache

No. of Transistors

Date Introduced

Power2 SuperChip[1]

Yes

160MHz

32-bit

32-bit

4GB

160KB

Off-chip

15 million

1996

Power3

Yes

200MHz

64-bit

64-bit

512GB

96KB

Off-chip

15 million

1998

Power3-II[2]

Yes

375450Hz

64-bit

64-bit

512GB

96KB

Off-chip

15 million

2000

Power4 (dual-core)[3]

Yes

1.01.3GHz

64-bit

64-bit

256GB

96KB

1.5MB

174 million

2001

Power4+[4] (dual-core)

Yes

1.21.7GHz

64-bit

64-bit

256GB

96KB

1.5MB

184 million

2003

Power5[4](dual-core)

Yes

1.41.65GHz

64-bit

64-bit

2TB

96KB

1.92MB

276 million

2003

Power5+[5] (dual-core)

Yes

1.9GHz

64-bit

64-bit

2TB

96KB

1.92MB

276 million

2005


[1] Power2 was originally an eight-chip assembly.

[2] This processor was built using .25-micron process technology.

[3] This processor was built using .18-micron silicon-on-insulator (SOI) process technology.

[4] These processors were built using .13-micron SOI process technology.

[5] This processor was built using .09-micron SOI process technology.

Table 2.7 lists the specifications for PowerPC server processors from 1995 to the present.

Table 2.7. Specifications of PowerPC Server Processors, 1995Present

Processor

Multi-processor Support

Clock Speeds

Internal Register Size

Data Bus Width

Max. Memory

L1 Cache

L2 Cache

L3 Cache

No. of Transistors

Date Introduced

PowerPC 604

Yes

100180MHz

32-bit

64-bit

4GB

32KB

Off-chip

3.6 million

1995

PowerPC 604e

Yes

166350MHz

32-bit

64-bit

4GB

64KB

Off-chip

3.6 million

1997

PowerPC 740 G3 (.25 micron)

Yes

200433MHz

32-bit

64-bit

4GB

64KB

Off-chip

6.35 million

1997

PowerPC 750 G3 (.22 micron)

Yes

200466MHz

32-bit

64-bit

4GB

64KB

Off-chip

6.35 million

1997

PowerPC 750CX (SideWinder) (.18 micron)

Yes

350550MHz

32-bit

64-bit

4GB

64KB

256KB

21.5 million

2000

PowerPC 750CXe (Anaconda) (.18 micron)

Yes

400700MHz

32-bit

64-bit

4GB

64KB

256KB

21.5 million

2001

PowerPC 750FX (G3 series) (.13 micron SOI)

Yes

600800MHz

32-bit

64-bit

4GB

64KB

512KB

39 million

2002

PowerPC 750GX (.13 micron SOI)

Yes

800MHz1GHz

32-bit

64-bit

4GB

64KB

1024KB

44 million

2004

PowerPC G4 7400 (.20 micron)

Yes

350500MHz

32-bit

64-bit

4GB

64KB

Off-chip

10.5 million

1999

PowerPC G4 7410

Yes

533MHz

32-bit

64-bit

4GB

64KB

Off-chip

10.5 million

2001

PowerPC G4 7450

Yes

533800MHz

32-bit

64-bit

4GB

64KB

256KB

10.5 million

2001

PowerPC G4 7455

Yes

8001.33MHz

32-bit

64-bit

4GB

64KB

256KB

10.5 million

2002

PowerPC 970 (G5) 0.13 micron SOI

Yes

1.61.8GHz

64-bit

64-bit

4TB

64KB

512KB

52 million

2003

PowerPC 970FX (0.09 micron)

Yes

1.42.7GHz

64-bit

64-bit

4TB

96KB

512KB

58 million

2004

PowerPC 970MP (0.09 micron) (dual-core)

Yes

1.42.5GHz

64-bit

64-bit

4TB

96KB

1024KB

116 million

2005


Note

PowerPC processors not listed are designed for use in desktop or notebook computers.


For an overview of Sun SPARC processors, see Table 19.1, p. 787.


For additional information about Alpha, PA-RISC, MIPS, Power Architecture, and PowerPC processors, see "RISC-Based Server Processors," p. 130.


Server Processor Specifications

Server processors, like all other processors, can be identified by two main parameters: how wide their data path is and how fast they are. The speed of a processor is a fairly simple concept. Speed is counted in megahertz (MHz) and gigahertz (GHz), which means millions and billions, respectively, of cycles per secondand faster is better. The width of a processor is a little more complicated to discuss because three main specifications in a processor are expressed in width:

  • Data I/O bus

  • Address bus

  • Internal registers

Note that the processor side bus (PSB) is also called the front-side bus (FSB) or CPU bus. These terms all refer to the bus that is between the CPU and the main chipset component (North Bridge or memory controller hub [MCH]). Intel uses the FSB or PSB terminology, whereas AMD uses only FSB. CPU bus is the least confusing of the terms, and it is also completely accurate.

Generally speaking, the speed of a processor can be determined by two factors:

  • The internal clock speed of the processor

  • The speed of the CPU bus

In terms of clock speed, the fastest server processors from each manufacturer listed in Tables 2.12.7 and in Chapter 19 include the following in order, from highest to lowest clock speed:

  • Intel Pentium 4 3.8GHz (single-core)

  • Intel Pentium D, Pentium Extreme Edition 3.2GHz (dual-core)

  • AMD Opteron 854/254/154 2.8GHz (single-core)

  • PowerPC 970MP/G5 2.5GHz (dual-core)

  • AMD Opteron 880/280/180 2.4GHz (dual-core)

  • PA-8900 2.0GHz (dual-core)

  • IBM Power5+ 1.9GHz (dual-core)

  • Sun UltraSPARC III 1.593GHz

  • Sun UltraSPARC IV 1.35GHz (dual-core)

  • Alpha 21364 1.3GHz

  • MIPS R16000 700MHz

Clock speed figures by themselves can be very misleading. Other factors, including chip architecture, the size of the address bus, single or dual-core design, the presence and size of L2 (and L3) memory cache, the speed of the processor bus, the number of processors installed, and whether the system is using SMP or NUMA multiprocessing also affect server performance.

Dual-core designs, which have become very common in the past few years, provide a huge benefit to servers because they provide virtually every benefit of multiple processors, even if the server has room for only one processor. They enable servers to handle more programs and execution threads without slowing down. For example, a single-processor server using a dual-core processor can handle multitasking almost as well as a dual-processor server. A two-way (dual-processor) server becomes the virtual equivalent of a four-way server if dual-core processors are used, and so forth. Although most dual-core processors are slightly lower in clock speed than single-core processors from the same family because of thermal issues, the increased workload, especially in server-oriented tasks, makes a dual-core processor worthwhile.

Other portions of the server design, such as system memory speeds and sizes, the speed and interfaces used for network adapters and hard disks, and the operating system used, also affect the actual throughput of a particular server.

Because a server provides services to client devices, a server's performance is measured by metrics such as the number of simultaneous clients that can be serviced and the speed at which each client receives information.

For more information about server benchmarking, see Chapter 21, "Server Testing and Maintenance."


How can you determine what processor is installed in a server? If the server is using Windows 2000 Server or Windows Server 2003, you can use SiSoftware Sandra (available from www.sisoftware.co.uk) to determine the processor model, speed, and other information about your system, whether it is running an x86, Alpha, or Itanium processor.

To determine basic 64-bit or 32-bit compatibility with Linux or UNIX (RISC) platforms, you can use various command-line options, including the following:

  • getconf or file (IBM-AIX)

  • isainfo or uname (Sun Solaris)

  • uname (Linux)

With a MacOS server, you select Apple, About This Mac.

Tip

To learn more about these commands, see the STATA FAQs "How Can I determine if my computer/OS is 64-bit?" page, at www.stata.com/support/faqs/win/64bit.html.


For more detailed information about the processor(s) in your RISC-based server, contact your hardware vendor.

The Data I/O Bus

Perhaps the most important features of a processor are the speed and width of its external data bus. This defines the rate at which data can be moved into or out of the processor, also called the throughput.

The processor bus discussed most often is the external data busthe bundle of wires (or pins) used to send and receive data. The more signals that can be sent at the same time, the more data that can be transmitted in a specified interval and, therefore, the faster (and wider) the bus. Having a wider data bus is like having a highway with more lanes, which enables greater throughput. Servers that work with large databases benefit the most from wide data buses.

Data in a computer is sent as digital information consisting of a time interval in which a single wire carries a specified voltage to signal a 1 data bit or 0V to signal a 0 data bit. The more wires you have, the more individual bits you can send in the same time interval. A good way to understand this flow of information is to consider a highway and the traffic it carries. If a highway has only one lane for each direction of travel, only one car at a time can move in a certain direction. To increase traffic flow, you can add another lane in each direction so that twice as many cars pass in a specified time. You can think of an 8-bit chip as being a single-lane highway because 1 byte flows through at a time. (1 byte equals 8 individual bits.) The 16-bit chip, with 2 bytes flowing at a time, resembles a two-lane highway. You might have four lanes in each direction to move a large number of automobiles; this structure corresponds to a 32-bit data bus, which has the capability to move 4 bytes of information at a time. Taking this further, a 64-bit data bus is like an 8-lane highway moving data in and out of the chip.

All current server processors feature 64-bit (8 bytes wide) data buses. Therefore, they can transfer 64 bits of data at a time to and from the motherboard chipset or system memory.

The Address Bus

The address bus is the set of wires that carries the addressing information used to describe the memory location to which the data is being sent or from which the data is being retrieved. As with the data bus, each wire in an address bus carries a single bit of information. This single bit is a single digit in the address. The more wires (digits) used in calculating these addresses, the greater the total number of address locations. The size (or width) of the address bus indicates the maximum amount of RAM a chip can address.

Figure 2.1 shows how the data, address, and control buses relate to each other.

Figure 2.1. How data, address, and control buses connect the processor, memory, and I/O components of a server.


The earlier highway analogy (from the section "The Data I/O Bus") can be used to show how the address bus fits in. If the data bus is the highway, and the size of the data bus is equivalent to the number of lanes, the address bus relates to the house number or street address. The size of the address bus is equivalent to the number of digits in the house address number. For example, if you live on a street in which the address is limited to a two-digit (base 10) number, no more than 100, or 102, distinct addresses (0099) can exist for that street. Add another digit, and the number of available addresses increases to 1,000 (000999), or 103.

Computers use the binary (base 2) numbering system, so a two-digit number provides only four unique addresses (00, 01, 10, and 11), calculated as 22. A three-digit number provides only eight addresses (000111), which is 23. For example, Pentium 4 processors use a 36-bit address bus that calculates as a maximum of 236, or 68,719,476,736 bytes (36GB), address locations. Table 2.8 describes the physical memory-addressing capabilities of server processors.

Table 2.8. Server Processor Memory-Addressing Capabilities

Processor Family

Address Bus

Bytes

Kilobytes (KB)

Megabytes (MB)

Gigabytes (GB)

Terabytes (TB)

Pentium, PowerPC 604 series, 7xx, 74xx series; Sun UltraSPARC II series

32-bit

4,294,967,296

4,194,304

4,096

4

Pentium Pro, Pentium II/Xeon, Pentium III/Xeon, Pentium 4, Xeon; Athlon MP

36-bit

68,719,476,736

67,108,864

65,536

64

Opteron; Alpha 21164; PA-80008600

40-bit

1,099,511,627,776

1,073,741,824

1,048,576

1024

1

PowerPC 970/G5 series

42-bit

4,398,046,511,104

4,294,967,296

4,194,304

4096

4

Itanium family; Alpha 21264, Alpha 21364; PA-87008900; R1xxxx series; UltraSPARC III, UltraSPARC IV

44-bit

17,592,186,044,416

17,179,869,184

16,777,216

16,384

16


The width of the data bus and the size of the address bus are not dependent on each other, and chip designers can use whatever size they want for each. Usually, however, chips with larger data buses have larger address buses. The sizes of the buses can provide important information about a chip's relative power, measured in two ways: The size of the data bus is an indication of the chip's information-moving capability, and the size of the address bus tells how much memory the chip can handle.

As you can see from Table 2.8, more recent server processors generally have larger address buses than older processors. Larger address buses are critical for servers that must handle very large amounts of data, particularly when working with 64-bit operating systems and extremely large data sets. While 32-bit operating systems cannot directly address more than 4GB of RAM in most situations, 64-bit operating systems can address 1TB or more RAM.

Internal Registers

The size of the internal registers indicates how much information the processor can operate on at one time and how it moves data around internally within the chip. This is sometimes also referred to as the internal data bus, to distinguish it from the external data bus, which connects the processor to memory. A register is a holding cell within the processor; for example, the processor can add numbers in two different registers, storing the result in a third register. The register size determines the size of data on which the processor can operate. The register size also describes the type of software or commands and instructions a chip can run.

As described in the following sections, server processors fall into two categories: those with 32-bit registers and those with 64-bit registers.

32-Bit Processors

Internal registers are often twice the size of the external data bus, which means the chip requires two cycles to fill a register before the register can be operated on. Server processors with a 32-bit register size and 64-bit data bus, such as the Pentium Pro and its many descendents, up through most versions of the Pentium 4 and the AMD Athlon MP, use this design.

To enable the data to be processed efficiently, most 32-bit processors use multiple 32-bit pipelines for processing information. (A pipeline is the section of a processor that performs calculations on data.) As a result, recent processors can perform six or more operations per clock cycle.

Although 32-bit processors have reached very high clock speeds and process information efficiently, their biggest drawback is the 4GB limit on directly addressable memory.

Note

As Table 2.8 indicates, many Intel processors use a 36-bit address bus, which translates into 64GB of addressable memory. However, most processors with a 36-bit address bus have 32-bit register sizes, which limits addressable memory to 4GB. How can a 32-bit server support more than 4GB of RAM? Windows 2000 Advanced Server and Windows Server 2003 Enterprise Edition include a translation feature called Physical Address Extension (PAE), which enables the memory above 4GB to be accessed in 4GB blocks up to 16GB. To access memory above 16GB, some database applications such as SQL Server and Oracle use special APIs called Address Windowing Extensions. These workarounds are not necessary with processors that have 64-bit registers.


64-Bit Processors

Processors with a 64-bit register size can work with programs and data that exceed the 4GB limit imposed by 32-bit architecture. Thus, these processors can be more suitable for server use than 32-bit processors in applications that require manipulation of extremely large amounts of data. However, as discussed later in this chapter, there are profound differences in how different 64-bit processor architectures work with existing 32-bit operating systems and programs. If you plan to use a 64-bit server with existing software, you need to carefully consider these differences before you choose a particular processor platform.

Current 64-bit server processors include the following:

x86-based 64-bit processors (can also run x86 32-bit software at full speed):

  • AMD Opteron

  • Intel Pentium D

  • Intel Pentium Extreme Edition

  • Intel Pentium 4 (selected models)

  • Intel Xeon (selected models)

EPIC-based 64-bit processors (can also run x86 32-bit software, but not at top speed):

  • Intel Itanium

  • Intel Itanium 2

RISC-based 64-bit processors (compatible with 32-bit RISC-based software varies):

  • Power3 and higher series

  • Alpha (all models)

  • PowerPC G5/970 series

  • PA-RISC 8xxx series

  • MIPS R4xxx and higher series

  • UltraSPARC (all models)

As you can see from this list, although x86-compatible server processors with 64-bit capabilities are relatively new, 64-bit capabilities have been available since the mid-1990s in RISC-based processors. Keep in mind that a 64-bit processor can take full advantage of its architecture only when running a 64-bit operating system and 64-bit applications.




Upgrading and Repairing Servers
Upgrading and Repairing Servers
ISBN: 078972815X
EAN: 2147483647
Year: 2006
Pages: 240

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