Chapter 8. HT Interrupts

The Previous Chapter

To review the principles of HT transactions and to provide a more comprehensive understanding, the previous chapter presented examples of complex system transactions, including reads, posted and non-posted writes , and atomic read-modify-write.

This Chapter

HT uses an interrupt signaling scheme very similar to PCI's Message Signaled Interrupts. This chapter defines how HT delivers interrupts to the Host Bridge via posted memory writes. This chapter also defines an End of Interrupt message and details the mechanism that HT uses for configuring and setting up interrupt transactions (which is different from the PCI-defined mechanisms).

The Next Chapter

Rather than requiring HT devices to incorporate additional pins for signaling system- related items such as power management events, System Management messages are defined that permit signaling via transactions, thereby creating virtual wires. The next chapter defines the mechanism used to send these messages, by detailing the System Management packets and protocol. Some System Management functions such as changing the operating frequency of an HT link require that transactions be stopped . The chapter also introduces the ability to temporarily disconnect the links to allow these types of state changes, and to save power.