List of Figures

Chapter 1: A Hard Start

Figure 1.1: Block Diagram of a Typical Embedded System.

Figure 1.2: Conditioned Reset Input.

Figure 1.3: External Watchdog Timer.

Figure 1.4: Differential Drive and Noise Immunity.

Figure 1.5: Schematic CPU.

Figure 1.6: Schematic Flash and RAM.

Figure 1.7: Connection Between CPU and Boot Flash Device.

Figure 1.8: Cache Between CPU and External Devices.

Figure 1.9: Data-Cache Instruction-Cache Inconsistency.

Chapter 2: Getting Started

Figure 2.1: Example Executable File Format.

Figure 2.2: File Containing Raw Binary Data Destined for Boot Flash Memory.

Figure 2.3: Reset Vector <-> Boot Flash Configuration.

Figure 2.4: Flash Relative vs. CPU Relative Address Space.

Chapter 3: Introducing MicroMonitor

Figure 3.1: Applications and MicroMonitor.

Chapter 6: Interfacing to Flash Memory

Figure 6.1: Two Flash Devices, Two Separate Banks.

Figure 6.2: Two Flash Devices, One Single Bank.

Figure 6.3: Adjusting Start Address to 32-bit Alignment.

Chapter 7: A Flash File System

Figure 7.1: TFS Overlayed on a Flash Device.

Figure 7.2: Files (Data and Header) Within Flash Space.

Figure 7.3: TFS Defragmentation Process.

Figure 7.4: Example File Store Configuration.

Figure 7.5: Defragmentation Active Sector = 8.

Figure 7.6: Defragmentation Active Sector = 9.

Figure 7.7: Defragmentation Active Sector = 10.

Figure 7.8: Defragmentation Active Sector = 11.

Figure 7.9: Defragmentation Active Sector = 12.

Figure 7.10: Defragmentation Clean Up and Completion.

Figure 7.11: TFS File Decompression Strategy.

Figure 7.12: XIP vs. Non-XIP Flash Support.

Chapter 9: Network Connectivity

Figure 9.1: Ethernet Driver Buffer Descriptors.

Chapter 11: Adding the Application

Figure 11.1: Monitor Transfers File from Flash to DRAM.

Chapter 12: Monitor-Based Debugging

Figure 12.1: Single-Threaded Application Memory Map.

Figure 12.2: Multi-Threaded Application Memory Map.

Chapter 13: Porting MicroMonitor to the ColdFire MCF5272

Figure 13.1: MicroMonitor Source Tree.