Chapter 8: Design of Integrated CMOS Power Amplifiers for Wireless Transceivers

Mona M. Hella, Seoung-Jae Yoo, Mohammed Ismail

8.1 Introduction

The continuing reduction in production costs and improvements in personal communication systems has led to a tremendous growth in the wireless communications market. For cheap wireless terminals, it is attractive to integrate the RF frontend with the backend signal processing to reduce assembly cost. Until now, power amplifiers for wireless applications were produced almost exclusively in GaAs technologies, with a few exceptions in LDMOS, Si BJT and SiGe HBT. While CMOS provides high functionality and complexity at low costs, for an RF power amplifier, the problem of using CMOS technology is more severe than other blocks in the transceiver due to the limited voltage-handling capability. The linearity and power efficiency are lower than other technologies. Therefore, implementation of RF power amplifiers in CMOS has been one of the most challenging tasks for wireless transmitters. The design of power amplifiers in CMOS technology is mainly affected by the following factors.

1. Low breakdown voltage of deep-submicron technologies. This limits the maximum gate–drain voltage since the output voltage at the transistor's drain normally reaches 2 times the supply for classes B and F, and around 3 times the supply for class E operation. Thus, transistors have to operate at a lower supply voltage, delivering lower power. Additionally CMOS technology has lower current drive; i.e. the gain provided by the single stage is very low. Either multiple stages would be used or new design techniques, which would reduce the number of stages by decreasing the input drive requirements of the large transistors in the power amplifier (PA), are employed [1].

2. In contrast to semi-insulating substrates, a highly doped substrate is common in CMOS technology. This results in substrate interaction in a highly integrated CMOS IC. The leakage from an integrated power amplifier might affect the stability of, for example, the VCO in a transceiver chain.

3. Conventional transistor models for CMOS devices have been found to be moderately accurate for RF ICs, and need to be improved for analogue operation at radio frequencies. Large-signal CMOS RF models and substrate modelling are critical to the successful design and operation of integrated CMOS radio-frequency power amplifiers, owing to the large currents and voltage changes that the output transistors experience [2]. As a result, traditional PA design relies heavily on data measured from single transistors.

4. Since the inherent output device impedance in the power amplifier case is very low, impedance matching becomes very difficult, requiring higher impedance transformation ratios. Additionally, output matching elements require lower loss, and good thermal properties since there are usually significant RF currents flowing in these elements. If CMOS technology is used, losses in the substrate will decrease the quality factor of passive elements in the matching network. Usually the output-matching network is implemented off-chip as the antenna itself is off-chip.

5. The power amplifier delivers large output current in order to achieve required power at the load. This current can be high enough that electro-migration and parasitics in the circuit may cause performance degradation [2].

The goal of this chapter is to provide the main concepts and challenges of RF power amplifier designs in CMOS technology. In particular, the circuit techniques and analysis of power amplifiers for portable applications are discussed.