Chapter 6: Design and Automatic Tuning of Integrated Continuous-Time Filters

James Moritz, Yichuang Sun

6.1 Introduction

Examination of the block diagram of any wireless transceiver architecture reveals that filters are an essential building block. To satisfy all transceiver design requirements, many different types of filters operating over a wide range of frequency and bandwidth are required. Over a long period of time, several specialised technologies dedicated solely to filter implementation have evolved, for example, filters based on quartz crystal and ceramic resonators, LC filters using ferrites and other specialised magnetic materials, and at the upper end of the frequency range, transmission line elements fabricated as microstrip. These techniques yield high-performance filters; unfortunately, none of these components are available in designs using current IC technologies, and for a long time this created a barrier to the design of highly integrated RF systems, since many filtering functions had to be performed off-chip.

Developments in semiconductor processing and IC circuit design techniques during the past several years mean that it is now possible to implement continuoustime active filters with useful performance over an extremely wide frequency range. The possibility therefore exists of achieving the highly desirable goal of integrating all the filter functions required in many wireless transceiver applications. Single-chip transceivers with no external filtering components are now becoming commonplace for applications such as the Bluetooth and IEEE 802.11 standards [1, 2]. The current trend is to implement these designs using standard CMOS digital processes due to their low cost and ready availability. From the filter designer's point of view, a notable shortcoming of these current IC technologies is the loose tolerances that can be achieved on the values of on-chip components. Large variations in component values lead directly to large divergence of the achieved filter response from the intended design specifications. It is not normally possible to adjust component values after fabrication, therefore an almost universal requirement for integrated continuous time filters is the need for on-chip tuning, and the tuning system may well be the most difficult challenge in achieving satisfactory filter performance.

This chapter is divided into the following sections. Section 6.2 discusses requirements for filters in the context of fully integrated wireless transceivers, and the need for on-chip tuning systems. Section 6.3 describes methods of filter implementation. Different filter architectures including the second-order cascade, multiple loop feedback and ladder simulation are described. The most widely used techniques for filter implementation include the OTA-C and MOSFET-C techniques. The increasing operating frequency of integrated wireless transceivers and availability of on-chip inductors has led to the development of active-LC techniques. Section 6.4 discusses issues connected with filter tuning, including the difficulties introduced by circuit parasitics. Different methods of implementing filter tuning systems are outlined. Section 6.4.6 examines the special difficulties involved in tuning high-Q, high frequency filters, and describes a proposed tuning technique for the leap-frog class of bandpass filter. The chapter is summarised in Section 6.5.