2.9 Conclusions

This chapter has presented a highly digitised, low-IF receiver architecture intended for use in a cellular radio application such as GSM. Its novel feature is that by processing only the real part of the complex IF signal after the mixer, it avoids the need for a complex ADC, thereby resulting in a very much simpler and more adaptable ADC circuit design. Advancing the position of the ADC in a low-IF receiver already gives improved adaptability by moving the channel filtering into the digital domain. This overalladaptabilityisfurtherimprovedintheproposedarchitecture, aswellasoffering the opportunity for a modest saving in power consumption. The non-complex signal processing causes an inevitable loss in image rejection but this problem is easily overcome by including a simple passive polyphase filter before the ADC. The ADC itself is realized as a fifth-order ΣΔ modulator running with a clock speed of 26 MHz. Its bit-stream output is filtered extremely efficiently by a pair of digital FIR filters whose task is also to reconstruct the Q component of the complex baseband signal. System simulations demonstrate the effectiveness of the overall signal processing strategy and confirm that the level of performance needed to realize a competitive GSM product can be readily achieved. The application of the new architecture in a multimode receiver for GSM and UMTS has also been discussed.