2.7 System simulations


2.7 System simulations

A series of system simulations has been carried out to verify the basic functionality of the modified receiver and its ability to meet the various GSM specifications. For increased confidence in the results, these simulations were carried out in two parallel exercises, one involving the coding of the various signal processing functions in FORTRAN and the other involving the use of the commercially available software SPW [12]. The relevant system block diagram for the simulations is given in Figure 2.16, the upper part of which is concerned with generating the receiver input signal, the middle part comprises the majority of the IF signal chain and the lower part deals with demodulation and equalisation. All the BER calculations are based on a comparison of physical (i.e. not coded) bits at the bit rate of 270.833 kb/s. As shown, the receiver input comprises a wanted signal centred initially on a zero IF and an interferer shifted by an arbitrary frequency offset, both of which pass through independent, fading channels. On entry into the receiver, Gaussian noise is added at a level of 115 dBm to take account of the 6.0 dB noise figure of the frontend. The whole spectrum is then translated by 100 kHz to position the wanted signal on the chosen IF.

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Figure 2.16: Block diagram for simulations

All the filters of the receiver system are modelled as FIR devices, including the AC couplings whose cut-off frequency is 10 kHz. The gain of the amplifier shown at the input to the polyphase filter has a fixed value of 16 dB, which when the 4 dB gain of the polyphase filter and the 3 dB loss associated with dropping the Q channel are added, maps the maximum input level of a blocking signal at 23 dBm on to the 6 dBm maximum drive level of the single ΣΔ modulator.

The simulations for receiver sensitivity with a TU50 propagation channel yield the results plotted in Figure 2.17. As shown, without the ΣΔ modulator present, the BER falls through a value of 8 per cent for an input signal power of 108.5 dBm and continues to fall towards zero at an input power of 82 dBm. It remains zero for all higher input powers since without the ΣΔ modulator the receiver is perfectly linear. With the ΣΔ modulator present, the degradation in receiver sensitivity for a BER of 8 per cent is less than 0.5 dB, confirming that the quantisation noise power generated by the modulator must be at or below the intended value of 125 dBm. Hence, in terms of sensitivity the receiver achieves its target performance of 108 dBm. At higher signal levels the ΣΔ modulator appears to cause some minor degradation in BER for input powers in the region of 80 dBm. This effect is believed to be linked to the non-linear behaviour of the channel equaliser for very low BERs, rather than just a simple loss of signal-to-noise ratio. In any case it is of little consequence. At still higher power levels the BER is substantially zero until it rises sharply at an input power of 20 dBm. The rise in BER is caused by an overdrive of the ΣΔ modulator. As the receiver must operate with a maximum input signal level of 15 dBm (static channel) this rise in BER is slightly premature. However, there is some doubt over the accuracy of the behavioural model used for the ΣΔ modulator when operating under such large-signal conditions and results obtained in practice suggest that a real receiver is more likely to meet this particular performance requirement. If it does not then it would not be difficult to increase the dynamic range at the high end by introducing a simple one-step change in the gain of the frontend.

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Figure 2.17: System simulations for receiver sensitivity

Figure 2.18 illustrates the selectivity performance of the receiver in dealing with cochannel, adjacent-channel and alternate-channel interferers. In each case, the BER for a TU50 propagation channel is plotted against the relative level of the interferer whilst the wanted signal is held at a constant level of 82 dBm. For the cochannel interferer, the receiver passes the GSM specification by a margin of 1.5 dB, thereby confirming that the passband of the channel filters is well chosen and not unduly narrow. In the presence of the adjacent-channel interferers the receiver passes the specification by a margin of approximately 6 dB, the rejection of the interferer on the lower side being provided largely by the action of the polyphase filter and that on the upper side largely by the digital channel filters. For the alternate-channel interferers, the margin on the specification is even greater at a value of about 14 dB. This is despite the overdrive of the ΣΔ modulator that is the principal cause of the rise in BER at a relative interferer level of +55 dB.

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Figure 2.18: System simulations for selectivity




Wireless Communication Circuits and Systems
Wireless Communications Circuits and Systems (IEE Circuits, Devices and Systems Series 16)
ISBN: 0852964439
EAN: 2147483647
Year: 2004
Pages: 100
Authors: Yichuang Sun

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