3.5 The Analog Front End (AFE)

   


ADSL transmission systems benefit greatly from well-designed analog interface to the telephone line. Transmit filter designs are covered in [1] in detail. This section instead discusses precision requirements and sampling methods for both transmit DAC and receiver ADC on an ADSL line. Basically the requirements are stringent. Fortunately, although perceived as difficult at the time of standardization of first ADSLs, today, analog front ends (or AFEs) for ADSL abound in low-cost high-performance packages.

3.5.1 Linearity and Noise Requirements

ADSL at time of conception , and still today, is one of the more challenging analog designs known to engineers . The basic problem can almost seem insurmountable in that a signal with up to 20 dBm of transmit power, with peaks to 32 dBm, is present on the same line with a severely attenuated signal from the other direction, possibly by as much as 60 dB with (even with that attenuation) an SNR of 30 dB. That means the dynamic range of at least a few components, presuming hybrid reduction of 12 dB, may need to be as high as 110 dB. Prior to ADSL, no one had attempted a linearity for phone-line coupling that exceeded 70 dB. Fortunately, not all analog components need exhibit this huge dynamic range. Additionally, the noise floor of an ADSL modem is sometimes limited by the modem's internal components . Although ADSL standards suggest “140 dBm/Hz as the lowest noise PSD of concern, thermal noise on a telephone line can actually be as low as the fundamental physical limit of “173 dBm/Hz (kT at room temperature). Designers who desire maximum range on DSL lines actually try to set internal noise floors between “155 and “160 dBm/Hz. An early DSL company called Amati was able to prototype a "Prelude ADSL" modem with in excess of 110 dB of linearity and “156 dBm/Hz noise floor (of which about 200 were constructed and delivered to various ADSL-interested companies around the world who were subsequently able to evaluate and then devise methods for reproducing such performance in mass). Others then proceeded to capture the concepts in mass-produced cost-effective packages.

Figure 3.16 depicts the essential components of the analog front end (AFE), which is often 1 “2 integrated circuits and associated discrete components in a DSL modem of any type. The asymmetry of ADSL allows some cost reduction and opportunity for performance with respect to symmetric transmission, and the AFE component at each end may be different. At the ATU-C side, the ADSL modems are colocated for many lines within a DSLAM, and there may be several then integrated on a single chip to save space and power at the CO. At the ATU-R side, there is only one line typically so that integration of multiple AFE's is of limited value if any unless multiple lines are coordinated (see Sections 7.5 and 10.5).

Figure 3.16. Analog front ends.

graphics/03fig16.gif

Typically, AFE chips are isolated from other ADSL-DSP chips for cost/performance reasons. The point of separation is usually the interface to/from the DAC, and ADC so Figure 3.16 contains more than what is typically on the AFE chip.

3.5.2 Central Office Side

The transformer that couples to the line is one device that needs to exhibit high linearity. [13] Fortunately, linearity is a function of magnetic core choices and winding techniques. With sufficient volume in production, these factors have not yet been significant. However, as the rest of the integrated ADSL modem continues to drop in price, the transformer could again become a significant cost item. It is also possible to introduce magnetic feedback in designs to achieve in excess of “120 dB linearity. Some of the most creative concepts involve the use of magneto-electro-mechanical modules that may ultimately allow integration of the transformer into the AFE chip. If the splitter circuit is implemented in analog, it also needs to maintain the high linearity, although today increasing interest has shifted to ADSL systems that do not require a central office (nor customer premises) splitter and instead deliver voice service digitally (see Section 3.7).

[13] Many DSL suppliers today may sacrifice linearity and try to deal with the consequent distortion in digital signal processing, which may become more common in the future to squeeze the last costs from mass-produced products.

The line driver is ADSL's largest consumer of power. Power consumption is determined by peak line-drive power (not average), which is 32 dBm in a well-designed DMT downstream transmitter. Even the best designs today consume 1 watt in the driver circuit, which is about 10 percent efficiency relative to the 100 mW transmit power. This is the dominant part of transmit power and the entire modem may require otherwise less than another watt. The solution that has started to emerge is the exploitation of quiet periods of the always-on DSL modem to transmit a signal with only about 6 dB peak-to-average ratio. This is the L2 mode of G.992.3/4 mentioned earlier, possibly augmented by a Q-mode in the future.

The driver power consumption may be reduced by over a factor of 2 statistically when the ADSL modem traffic is predominantly data. This requires a line driver that scales its consumed power according to a supplied control signal, which is now common in ADSL designs. Furthermore, DSLAMs with many modems draining power from a common source may reduce transmit power where it is not necessary on shorter lines, thus on average reducing power consumption per line. (See also the iterative-waterfilling concept in Chapter 11.) The driver and associated filter also need to maintain linearity at high levels. Frequency-division multiplexed (FDM) ADSL modems, also known as Annex A and B (G.992 standards [3]) divide upstream and downstream transmission by frequency. Such a design relaxes the linearity requirement for the line driver because the large downstream signals do not overlap the frequency band of the small received upstream signals because the transmit high-pass and receive low-pass filters prevent such overlap. The DAC and linearity requirements in this case are determined by the downstream path (presuming some analog high-frequency boost on long lines in the downstream receiver) at 14 bits, or equivalently 90 dB for the filter and driver analog components. See [1] for filter and driver designs.

With increasing stress on higher upstream and downstream data rates, FDM designs have become increasingly replaced by echo-canceled designs. Echo cancellation allows overlap of upstream and downstream signals over at least the lower 138 kHz (and sometimes lower 276 kHz when ISDN is also on line). Echo canceled modems achieve higher data rates. Echo cancelers can be used in FDM modems to simplify the analog filter design in the overlapping transition band. Full overlap can force the use of 16 bit DACs and up to 18 bit ADCs to maintain the 110 dB linearity requirement. However, full overlap is rare. Because CO upstream bandwidth is 138 kHz, oversampling at 8 MHz or higher is used with clever digital filters and a smaller number of bits in the ADC, to meet its requirements and typically also the transmit DAC. Often in practice, manufacturers do not completely echo cancel nor completely implement FDM, but instead find an acceptable trade-off point in terms of cost and performance.

Transformer and driver linearity may also be reduced by hybrid circuits. Typically a fixed hybrid circuit provides at least 12 dB of signal reduction, which was used in the above calculations. A reduction of 24 “30 dB is possible with adaptive hybrids that match their internal balancing impedance to the line. Such a design reduces all linearity requirements and ADC/DAC requirements by 12 “18 dB or equivalently 2 “3 bits, allowing for super low-cost and high-performance ADCs. An automatic gain control (AGC) circuit precedes the ADC and is discussed in [1]; its use ensures the maximum number of bits are always best used by the ADC. It can also be used to reduce the number of bits in the ADC, although effectively the ADC and AGC can be viewed at a higher level as an ADC with the same degree of linearity.

3.5.3 Customer Premises Side

The CPE side AFE is also shown in Figure 3.16. The essential differences are that the line driver need only transmit 14 dBm of power, saving a bit everywhere nominally, but the receiver sampling rate is eight times higher so that oversampling of the ADC provides less increase in resolution than at the CO side. A splitter circuit may or may not be used, and linearity requirements are essentially about 1 bit less than the CO side. Low noise is particularly important at the CPE end where it can extend the range of usable frequencies and thereby range at any data rate downstream. Echo cancellation and adaptive hybrids can also be used to reduce requirements.

The prefilter before the ADC is usually a set of filters with increasing amounts of high-frequency boost for increasing long lines. This has the effect of altering the channel signal and noise levels with respect to the ADC noise floor at higher frequencies, effectively making the AFE look as if its ADC has more effective bits. For a complete analysis of this type of filter, see Chapter 7 in VDSL, where it is also used.

The receiver analog filter (Figure 3.16) needs to have very low noise. Often, this can happen only with the use of very special design of gain control circuits. On a very long line, the signal needs to be amplified after the prefiltering to significant signal levels. However, on a short line or null loop, such amplification is unnecessary and would lead to saturation of the ADC circuit. The low noise floor is necessary only on the long loop. Thus gain control circuits and design need exhibit the low noise floor (-140 dBm/Hz or lower) only on long loops .

Perhaps the greatest single noise source often overlooked by new ADSL designers is the noise of the other ADSL components themselves . Layout of components in an ADSL receiver is very important. Digital electronics needs to be isolated well from analog components, because the noise associated with digital power supplies and digital logic is often well above the levels needed for ADSL. This is why AFE components are most often separate from digital-signal-processing components. [14] Optical isolation of the analog and digital sections is extremely effective but expensive, although some groups have been able to achieve the same type of effect with clever proprietary designs. Analog sections and ground planes should be isolated as best as possible from digital ground planes. Additionally, the inside of a PC is a very harsh environment and requires careful attention to the radiation of energy from other parts of the computer into the ADSL board. Special metal (or mu metal) enclosure of critical analog components (analog transformer, and early filter stage components) may be necessary to ensure that noise levels are not artificially high. After engineers have labored for years to design effective ADSL standards, it is self-defeating for the final component layout and enclosure to cause more noise and distortion than the telephone line itself.

[14] Despite warnings and understanding of the problem, one major early modem supplier attempted a single-chip ADSL modem and was late-to-market due to noise problems, and consequently dropped from the ADSL market.

Although this area is somewhat of a "black art" (i.e., one dominated by those who know special secrets and tricks that remain proprietary to the employing company), good design practice and careful consideration of the AFE may lead to enormous advantage of one vendor's ADSL product over another. With range being particularly important to phone companies because of the labor costs associated with special service visits , it may not be the cheapest component that actually is the lowest cost for the ADSL system. This can be a lesson hard learned for some, and ADSL designers are well advised not to underestimate this area.


   
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DSL Advances
DSL Advances
ISBN: 0130938106
EAN: 2147483647
Year: 2002
Pages: 154

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