Index_P

P

packet 186

packet switch 186

packet-switched backplane 133

parameters, basic 70

partitioning

abstraction in multi board architectures 140

hardware and software 26

PATRICIA tree 75

payload 186

PBX 9, 186

PCI 167, 186

PCI mezzanine card

PMC 132

PDU 186

preprocessing 64

PDU preprocessing 186

peer 2, 186

performance testing 162

periodic checkpoint

in hot-standby systems 153

peripheral component interconnect 167

per-port information 78

PHY 186

physical interface 186

physical layer 2

PICB 81, 186

PICMG 133, 186

PICMG 2.16 186

PIM 186

ping 186

pizza box design 132

planar networking architecture model 31

platform

demonstration 168

validation 168

PMC 186

see PCI mezzanine card

pointer-based indirection

in control blocks 81

point-to-point protocol 37

polling 42, 186

interval 44

routine 51

POSIX 55, 187

post-boot configuration 127

POTS 187

PowerPC 29

750 168

PPP 37, 187

PRD 157

predicate 187

in state event tables 62

in state machines 62

prepending

header prepending in buffer management 98

presentation layer 4

primary card

in redundant systems 152

primary mode

in redundancy 153

process 38, 187

timers 111

product manager 158

product requirements document 157, 187

PROM 24

proprietary interfaces 55

protocol 187

initialization 72

libraries 94

software 10, 57

specification 57

stack 8

upgrades 72

protocol interface control block 81

protocol mode

master 58

network 58

slave 58

user 58

protocol stack or protocol suite 187

pseudo header 187

in TCP 36

PVC 75, 187