Analyzing Interrupt and DPC Activity

On a multiprocessor system, interrupt-activity rates on different processors indicate how your system is distributing its workload among the available processors. Similar to context-switching rates, interrupt-activity rates can reveal distribution of work in a way that is inefficient and costly in terms of overall performance.

Most SMP systems can distribute hardware interrupts for handling on any of the processors. This allows interrupts to be handled by all processors, rather than concentrating the load on a single processor. In general, distributing interrupts provides better throughput. However, this depends greatly on the workload being processed.

When interrupts are distributed, the DPCs that arise from those hardware interrupts might run on different processors as well, meaning that their shared data is not cached but must be rewritten and reread. In addition, the assignment of a DPC to run on a different processor causes an interprocessor interrupt (IPI). An IPI is a high-Interrupt Request Level (IRQL) interrupt. Although it has a relatively low cost in terms of performance, like any interrupt, it reduces the efficiency of the processor cache of the target processor because cache lines are displaced by the interrupt.

At times when the system is developing a long processor queue or experiencing high rates of processor usage, observe the proportion of the processor's time that is spent servicing interrupts and DPCs. Compare the values of the Processor\% Interrupt Time and Processor\% DPC Time counters to Processor\% Processor Time.

If interrupt and DPC processor-time values are high, you need to investigate further:

• Observe the rate of interrupts and DPCs for each processor.
• Note whether interrupts and DPCs are distributed equally among all processors or whether one or more processors are servicing all of the interrupts or DPCs.

In general, a very high rate of interrupts might indicate a disk or a network adapter that needs upgrading or replacing. Test your components and rule out a hardware problem before proceeding. However, on a multiprocessor computer, the most common interrupt-related problem is its distribution among processors. It might be necessary to redistribute interrupts or DPCs or upgrade to a faster processor to avoid a bottleneck.

For information about how to manage interrupt, DPC, and other activity for better SMP performance, see "Optimizing and Tuning Multiprocessor Installations" later in this chapter.

© 1985-2000 Microsoft Corporation. All rights reserved.