Table of content
Binary-coded decimal notation
A byte ordering of either big-endian or little-endian supported by a processor.
Note that the byte is endianless; that is, whether it is big-endian or little-endian, the MSB (most significant bit) is bit #7 and the LSB (least significant bit) is bit #0.
The byte ordering typically used by large mainframes. For purposes of this book, that would include the EE, VU, PowerPC-AltiVec, and PowerPC-Gekko processors.
The process of transferring one or more blocks of data. The etymology of the word is Bacon, Lettuce, and Interactive Tomato.
A methodology used by a processor to predict at a conditional jump whether an instruction branch will be taken or not.
Board Support Package
Branch Target Buffer
Table of content
32/64-Bit 80x86 Assembly Language Architecture
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