Parallel Computing on Heterogeneous Networks, by Alexey Lastovetsky
ISBN 0-471-22982-2 Copyright 2003 by John Wiley & Sons, Inc.
The starting-point of evolution of parallel architectures is the traditional serial scalar von Neumann architecture. This traditional architecture provides single control flow with serially executed instructions operating on scalar operands. Figure 1.1 depicts schematically the architecture. The processor has one instruction execution unit (IEU). Execution of an instruction can be only started after execution of the previous instruction in the flow is terminated. Except for a relatively small number of special instructions for data transfer between main memory and registers, the instructions take operands from and put results to scalar registers (a scalar register is a register that holds a single integer or float number). The total time of program execution is equal to the sum of execution times of the instructions. Performance of that architecture is determined by the clock rate.
Figure 1.1: Serial scalar processor architecture.