2.4 IO architectures

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2.4 I/O architectures

Input and output mechanisms are used by computer systems to move information into or out of the computer's main memory. A typical sequence for performing this movement of information from or to an input and output device is as follows:

1. Select an I/O device.

2. Busy-wait until the device is ready.

3. Transfer a word from the device I/O buffer into the CPU accumulator.

4. Transfer the contents of the accumulator into a memory location.

5. Compute the next memory location for I/O data.

6. Go back to step 2 and repeat until all data are transferred.

The above sequence assumes that all data must pass through the CPU to control the flow.

If, instead, we have the ability to place or extract data directly to or from memory without passing through the CPU, we can get further improvements in performance and a refined architecture. To allow for the CPU to be taken out of the I/O loop we need an additional control element. For I/ O to be controlled directly and bypass the CPU en route to memory requires added control; this controller is referred to as a direct memory access (DMA) device. The DMA device allows us to alter what the CPU must do. The CPU issues a begin I/O command to the DMA control unit with the address of the data block to be transferred. The CPU is now free from added input and output overhead and can be relieved to do some other processing or simply wait until the DMA responds that the transfer is complete. To effectively provide this notification an added capability is required of the CPU: an interrupt capability. The interrupts can be of several types, as follows:

• Interrupts can be immediate, causing the CPU to halt and service the interrupt.

• Interrupts can be deferred, allowing the CPU to service them when it is ready.

• Interrupts can be prioritized, allowing for prompt service to critical actions occurring in the system.

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