Index

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A

Access control, 78, 80

ACID transactions, 98–100

atomic, 98

consistent, 98–99

durable, 99–100

guaranteeing, 101

illustrated, 99

independent, 99

See also Transactions

Addressing, 80

Analysis module, 486–93

criteria and simulation, 490–91

criteria establishment, 486–90

defined, 483

functional diagram, 491

simulated message flow graph, 491

statistical output, 492–93

See also LAN simulator

Analytical modeling, 202

examples, 448–63

flexibility and, 333

HXDP model, 448–54

process, 202

token bus distribution system, 455–63

Analytical modeling tools, 30–32

defined, 30

queuing analysis, 30–31

Architectures, 2–10, 39–106

building blocks, 41

central I/O controller, 60

central I/O controller architectures, 60

common bus, 10, 61

computer, 9–10, 59–62

computer system support software, 62–92

construction of, 5

CPU, 5–6, 42–49

dual bus, 10, 61–62

evolution of, 2–10

instruction, 6–7, 47

I/O, 7, 49–50

memory, 7

memory-mapped, 60–61

network, 8–9, 54–57

Neumann, 59

operating systems, 64–79

research, 23

secondary storage, 8, 50–54

summary, 105–7

system, 362–72

Archival storage devices, 53–54

Arithmetic logic unit (ALU), 4, 41

defined, 5, 42

operation status, 5

See also CPU

ARPANET, 20

Asynchronous timing, 255

Authentication, 77

Authorization, 77

Availability, 341

AWESIM models, 380–97

experimental results and, 396–97

LINUX 7.2, 380–83

Windows ME, 390–91

Windows NT, 391–96

Windows XP, 383–89

See also Operating systems simulation

AWESIM simulation toolkit, 380



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Computer Systems Performance Evaluation and Prediction
Computer Systems Performance Evaluation and Prediction
ISBN: 1555582605
EAN: 2147483647
Year: 2002
Pages: 136

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